[arm][committed] Clean up code iterator usage in satsi* patterns

GCC 10 now supports having RTL codes being code attributes (thanks
Richard) allowing us to map smax to smin and vice versa.
This means we can clean up their use in the saturation patterns that do
the cross product of [smin, smax] and use the pattern
predicate to cancel out the nonsense ones.

	* config/arm/arm.md (SATrev): Change to code attribute.
	(*satsi_<SAT:code>): Adjust for the above.
	(*satsi_<SAT:code>_shift): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@273796 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 26f60f240d08942e8e1b50bc09a51c85b25b2980..05c8263630688c15ce01322403d087fda9fbb355 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2019-07-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * config/arm/arm.md (SATrev): Change to code attribute.
+       (*satsi_<SAT:code>): Adjust for the above.
+       (*satsi_<SAT:code>_shift): Likewise.
+
 2019-07-25  Richard Biener  <rguenther@suse.de>
 
        * gimple-loop-versioning.cc (loop_versioning::prune_loop_conditions):

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index dcb57372192c2ee4c93a6fd6dfdb771ff66c0e81..7ab939a35f5058f0cacb2824940c71c616e61b4b 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -3981,16 +3981,16 @@
 )
 
 (define_code_iterator SAT [smin smax])
-(define_code_iterator SATrev [smin smax])
+(define_code_attr SATrev [(smin "smax") (smax "smin")])
 (define_code_attr SATlo [(smin "1") (smax "2")])
 (define_code_attr SAThi [(smin "2") (smax "1")])
 
 (define_insn "*satsi_<SAT:code>"
   [(set (match_operand:SI 0 "s_register_operand" "=r")
-        (SAT:SI (SATrev:SI (match_operand:SI 3 "s_register_operand" "r")
+        (SAT:SI (<SATrev>:SI (match_operand:SI 3 "s_register_operand" "r")
                            (match_operand:SI 1 "const_int_operand" "i"))
                 (match_operand:SI 2 "const_int_operand" "i")))]
-  "TARGET_32BIT && arm_arch6 && <SAT:CODE> != <SATrev:CODE>
+  "TARGET_32BIT && arm_arch6
    && arm_sat_operator_match (operands[<SAT:SATlo>], operands[<SAT:SAThi>], NULL, NULL)"
 {
   int mask;
@@ -4011,12 +4011,12 @@
 
 (define_insn "*satsi_<SAT:code>_shift"
   [(set (match_operand:SI 0 "s_register_operand" "=r")
-        (SAT:SI (SATrev:SI (match_operator:SI 3 "sat_shift_operator"
+        (SAT:SI (<SATrev>:SI (match_operator:SI 3 "sat_shift_operator"
                              [(match_operand:SI 4 "s_register_operand" "r")
                               (match_operand:SI 5 "const_int_operand" "i")])
                            (match_operand:SI 1 "const_int_operand" "i"))
                 (match_operand:SI 2 "const_int_operand" "i")))]
-  "TARGET_32BIT && arm_arch6 && <SAT:CODE> != <SATrev:CODE>
+  "TARGET_32BIT && arm_arch6
    && arm_sat_operator_match (operands[<SAT:SATlo>], operands[<SAT:SAThi>], NULL, NULL)"
 {
   int mask;