crypto: qat - fix unintentional re-enabling of error interrupts

The logic that detects pending VF2PF interrupts unintentionally clears
the section of the error mask register(s) not related to VF2PF.
This might cause interrupts unrelated to VF2PF, reported through
errsou3 and errsou5, to be reported again after the execution
of the function disable_pending_vf2pf_interrupts() in dh895xcc
and GEN2 devices.

Fix by updating only section of errmsk3 and errmsk5 related to VF2PF.

Signed-off-by: Hareshx Sankar Raj <hareshx.sankar.raj@intel.com>
Reviewed-by: Damian Muszynski <damian.muszynski@intel.com>
Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen2_pfvf.c b/drivers/crypto/intel/qat/qat_common/adf_gen2_pfvf.c
index 70ef1196393814bd28ff5a4813d8e2f6c519cf54..43af81fcab86865331d13597a21b6e5db3cdbb81 100644 (file)
--- a/drivers/crypto/intel/qat/qat_common/adf_gen2_pfvf.c
+++ b/drivers/crypto/intel/qat/qat_common/adf_gen2_pfvf.c
@@ -100,7 +100,9 @@ static u32 adf_gen2_disable_pending_vf2pf_interrupts(void __iomem *pmisc_addr)
        errmsk3 |= ADF_GEN2_ERR_MSK_VF2PF(ADF_GEN2_VF_MSK);
        ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, errmsk3);
 
-       errmsk3 &= ADF_GEN2_ERR_MSK_VF2PF(sources | disabled);
+       /* Update only section of errmsk3 related to VF2PF */
+       errmsk3 &= ~ADF_GEN2_ERR_MSK_VF2PF(ADF_GEN2_VF_MSK);
+       errmsk3 |= ADF_GEN2_ERR_MSK_VF2PF(sources | disabled);
        ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, errmsk3);
 
        /* Return the sources of the (new) interrupt(s) */

diff --git a/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c b/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
index 6e24d57e6b98e6248b1cef6421909661cdb09616..c0661ff5e929278e946a381232f592e538fa371f 100644 (file)
--- a/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
+++ b/drivers/crypto/intel/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
@@ -193,8 +193,12 @@ static u32 disable_pending_vf2pf_interrupts(void __iomem *pmisc_addr)
        ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, errmsk3);
        ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, errmsk5);
 
-       errmsk3 &= ADF_DH895XCC_ERR_MSK_VF2PF_L(sources | disabled);
-       errmsk5 &= ADF_DH895XCC_ERR_MSK_VF2PF_U(sources | disabled);
+       /* Update only section of errmsk3 and errmsk5 related to VF2PF */
+       errmsk3 &= ~ADF_DH895XCC_ERR_MSK_VF2PF_L(ADF_DH895XCC_VF_MSK);
+       errmsk5 &= ~ADF_DH895XCC_ERR_MSK_VF2PF_U(ADF_DH895XCC_VF_MSK);
+
+       errmsk3 |= ADF_DH895XCC_ERR_MSK_VF2PF_L(sources | disabled);
+       errmsk5 |= ADF_DH895XCC_ERR_MSK_VF2PF_U(sources | disabled);
        ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, errmsk3);
        ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, errmsk5);