drm/amdgpu/gfx: add generic handling for disable_kq

Add proper checks for disable_kq functionality in
gfx helper functions.  Add special logic for families
that require the clear state setup.

v2: use ring count as per Felix suggestion
v3: fix num_gfx_rings handling in amdgpu_gfx_graphics_queue_acquire()
v4: fix error code (Alex)

Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index f64675b2ab752dbf4fc0141c9f92f30ea5f97ec3..0f84e5afd564a9a4fe311130b854d7134048b620 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -259,8 +259,9 @@ void amdgpu_gfx_graphics_queue_acquire(struct amdgpu_device *adev)
        }
 
        /* update the number of active graphics rings */
-       adev->gfx.num_gfx_rings =
-               bitmap_weight(adev->gfx.me.queue_bitmap, AMDGPU_MAX_GFX_QUEUES);
+       if (adev->gfx.num_gfx_rings)
+               adev->gfx.num_gfx_rings =
+                       bitmap_weight(adev->gfx.me.queue_bitmap, AMDGPU_MAX_GFX_QUEUES);
 }
 
 static int amdgpu_gfx_kiq_acquire(struct amdgpu_device *adev,
@@ -1545,6 +1546,9 @@ static ssize_t amdgpu_gfx_set_run_cleaner_shader(struct device *dev,
        if (adev->in_suspend && !adev->in_runpm)
                return -EPERM;
 
+       if (adev->gfx.disable_kq)
+               return -EPERM;
+
        ret = kstrtol(buf, 0, &value);
 
        if (ret)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index 319e6e547c7347002caf1cb2a98dc4f1ebcf5d04..caaddab31023f651bba87c1c6499c6dcbd0d92d9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
@@ -485,6 +485,8 @@ struct amdgpu_gfx {
        struct delayed_work             idle_work;
        bool                            workload_profile_active;
        struct mutex                    workload_profile_mutex;
+
+       bool                            disable_kq;
 };
 
 struct amdgpu_gfx_ras_reg_entry {