pinctrl: renesas: rzg2l: Adjust bit masks for PIN_CFG_VARIABLE to use BIT(62)

Shift the bit masks for `PIN_CFG_PIN_MAP_MASK` and `PIN_CFG_PIN_REG_MASK`,
to accommodate `PIN_CFG_VARIABLE` using `BIT(62)`.

Previously, these bit masks were placed higher up in the bit range, which
did not leave room for `PIN_CFG_VARIABLE` at `BIT(62)`. By adjusting these
masks, we ensure that `PIN_CFG_VARIABLE` can occupy `BIT(62)` without any
conflicts. The updated masks are now:
- `PIN_CFG_PIN_MAP_MASK`: `GENMASK_ULL(61, 54)` (was `GENMASK_ULL(62, 55)`)
- `PIN_CFG_PIN_REG_MASK`: `GENMASK_ULL(53, 46)` (was `GENMASK_ULL(54, 47)`)

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/r/20240618174831.415583-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index bfaeeb00ac4a1f07c4a0ba8374101bff5deeb99f..b79dd1ea2616304f2e225610b0fe8b210c1d92c6 100644 (file)
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -87,8 +87,8 @@
                                         PIN_CFG_FILNUM | \
                                         PIN_CFG_FILCLKSEL)
 
-#define PIN_CFG_PIN_MAP_MASK           GENMASK_ULL(62, 55)
-#define PIN_CFG_PIN_REG_MASK           GENMASK_ULL(54, 47)
+#define PIN_CFG_PIN_MAP_MASK           GENMASK_ULL(61, 54)
+#define PIN_CFG_PIN_REG_MASK           GENMASK_ULL(53, 46)
 #define PIN_CFG_MASK                   GENMASK_ULL(31, 0)
 
 /*