target/hexagon: add enums for event, cause

Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>

diff --git a/target/hexagon/cpu_bits.h b/target/hexagon/cpu_bits.h
index 2e60c0fafeda645a07c5d013323742896ad45021..ff596e2a94c987f28d24591e7b44aba2481962f6 100644 (file)
--- a/target/hexagon/cpu_bits.h
+++ b/target/hexagon/cpu_bits.h
@@ -23,15 +23,21 @@
 #define PCALIGN 4
 #define PCALIGN_MASK (PCALIGN - 1)
 
-#define HEX_EVENT_TRAP0           0x008
-
-#define HEX_CAUSE_TRAP0           0x172
-#define HEX_CAUSE_FETCH_NO_UPAGE  0x012
-#define HEX_CAUSE_INVALID_PACKET  0x015
-#define HEX_CAUSE_INVALID_OPCODE  0x015
-#define HEX_CAUSE_PC_NOT_ALIGNED  0x01e
-#define HEX_CAUSE_PRIV_NO_UREAD   0x024
-#define HEX_CAUSE_PRIV_NO_UWRITE  0x025
+enum hex_event {
+    HEX_EVENT_NONE           = -1,
+    HEX_EVENT_TRAP0          =  0x008,
+};
+
+enum hex_cause {
+    HEX_CAUSE_NONE = -1,
+    HEX_CAUSE_TRAP0 = 0x172,
+    HEX_CAUSE_FETCH_NO_UPAGE =  0x012,
+    HEX_CAUSE_INVALID_PACKET =  0x015,
+    HEX_CAUSE_INVALID_OPCODE =  0x015,
+    HEX_CAUSE_PC_NOT_ALIGNED =  0x01e,
+    HEX_CAUSE_PRIV_NO_UREAD  =  0x024,
+    HEX_CAUSE_PRIV_NO_UWRITE =  0x025,
+};
 
 #define PACKET_WORDS_MAX         4