Merge r1350, r1351, r1353 (x86 ADC Ib,AL implementation + related fixes)

git-svn-id: svn://svn.valgrind.org/vex/branches/VEX_3_0_BRANCH@1360

diff --git a/VEX/priv/guest-amd64/toIR.c b/VEX/priv/guest-amd64/toIR.c
index 5e6f9b3523e0da0df39b1e01f936c411dec109aa..b8c2326cf3faf8c2c74a0f05a836f84db642ca6e 100644 (file)
--- a/VEX/priv/guest-amd64/toIR.c
+++ b/VEX/priv/guest-amd64/toIR.c
@@ -53,12 +53,11 @@
    disInstr for details.
 */
 
-//.. /* TODO:
-//.. 
-//..    check flag settings for cmpxchg
-//..    FUCOMI(P): what happens to A and S flags?  Currently are forced
-//..       to zero.
-//.. 
+/* TODO:
+
+   All Puts to CC_OP/CC_DEP1/CC_DEP2/CC_NDEP should really be checked
+   to ensure a 64-bit value is being written.
+
 //..    x87 FP Limitations:
 //.. 
 //..    * all arithmetic done at 64 bits
@@ -91,7 +90,8 @@
 //..    bit be set by PUSHF.
 //.. 
 //..    This module uses global variables and so is not MT-safe (if that
-//..    should ever become relevant).  */
+//..    should ever become relevant).
+*/
 
 /* Translates AMD64 code to IR. */
 
@@ -1685,9 +1685,9 @@ static void helper_ADC ( Int sz,
                        mkexpr(oldcn)) );
 
    stmt( IRStmt_Put( OFFB_CC_OP,   mkU64(thunkOp) ) );
-   stmt( IRStmt_Put( OFFB_CC_DEP1, mkexpr(ta1) ) );
-   stmt( IRStmt_Put( OFFB_CC_DEP2, binop(xor, mkexpr(ta2), 
-                                              mkexpr(oldcn)) ) );
+   stmt( IRStmt_Put( OFFB_CC_DEP1, widenUto64(mkexpr(ta1))  ));
+   stmt( IRStmt_Put( OFFB_CC_DEP2, widenUto64(binop(xor, mkexpr(ta2), 
+                                                         mkexpr(oldcn)) )) );
    stmt( IRStmt_Put( OFFB_CC_NDEP, mkexpr(oldc) ) );
 }
 
@@ -1725,9 +1725,9 @@ static void helper_SBB ( Int sz,
                        mkexpr(oldcn)) );
 
    stmt( IRStmt_Put( OFFB_CC_OP,   mkU64(thunkOp) ) );
-   stmt( IRStmt_Put( OFFB_CC_DEP1, mkexpr(ta1) ) );
-   stmt( IRStmt_Put( OFFB_CC_DEP2, binop(xor, mkexpr(ta2), 
-                                              mkexpr(oldcn)) ) );
+   stmt( IRStmt_Put( OFFB_CC_DEP1, widenUto64(mkexpr(ta1) )) );
+   stmt( IRStmt_Put( OFFB_CC_DEP2, widenUto64(binop(xor, mkexpr(ta2), 
+                                                         mkexpr(oldcn)) )) );
    stmt( IRStmt_Put( OFFB_CC_NDEP, mkexpr(oldc) ) );
 }
 

diff --git a/VEX/priv/guest-x86/toIR.c b/VEX/priv/guest-x86/toIR.c
index 8b2b1e413cfaf7a84e7481a37c9f7fe515b9e424..7c3a450dba6c4d068460399cb2336c1159472c2b 100644 (file)
--- a/VEX/priv/guest-x86/toIR.c
+++ b/VEX/priv/guest-x86/toIR.c
@@ -46,7 +46,9 @@
 
 /* TODO:
 
-   check flag settings for cmpxchg
+   All Puts to CC_OP/CC_DEP1/CC_DEP2/CC_NDEP should really be checked
+   to ensure a 32-bit value is being written.
+
    FUCOMI(P): what happens to A and S flags?  Currently are forced
       to zero.
 
@@ -1027,9 +1029,9 @@ static void helper_ADC ( Int sz,
                        mkexpr(oldcn)) );
 
    stmt( IRStmt_Put( OFFB_CC_OP,   mkU32(thunkOp) ) );
-   stmt( IRStmt_Put( OFFB_CC_DEP1, mkexpr(ta1) ) );
-   stmt( IRStmt_Put( OFFB_CC_DEP2, binop(xor, mkexpr(ta2), 
-                                              mkexpr(oldcn)) ) );
+   stmt( IRStmt_Put( OFFB_CC_DEP1, widenUto32(mkexpr(ta1)) ));
+   stmt( IRStmt_Put( OFFB_CC_DEP2, widenUto32(binop(xor, mkexpr(ta2), 
+                                                         mkexpr(oldcn)) )) );
    stmt( IRStmt_Put( OFFB_CC_NDEP, mkexpr(oldc) ) );
 }
 
@@ -1063,9 +1065,9 @@ static void helper_SBB ( Int sz,
                        mkexpr(oldcn)) );
 
    stmt( IRStmt_Put( OFFB_CC_OP,   mkU32(thunkOp) ) );
-   stmt( IRStmt_Put( OFFB_CC_DEP1, mkexpr(ta1) ) );
-   stmt( IRStmt_Put( OFFB_CC_DEP2, binop(xor, mkexpr(ta2), 
-                                              mkexpr(oldcn)) ) );
+   stmt( IRStmt_Put( OFFB_CC_DEP1, widenUto32(mkexpr(ta1) )) );
+   stmt( IRStmt_Put( OFFB_CC_DEP2, widenUto32(binop(xor, mkexpr(ta2), 
+                                                         mkexpr(oldcn)) )) );
    stmt( IRStmt_Put( OFFB_CC_NDEP, mkexpr(oldc) ) );
 }
 
@@ -10756,11 +10758,11 @@ DisResult disInstr_X86_WRK (
       delta = dis_op_imm_A( sz, False, Iop_Or8, True, delta, "or" );
       break;
 
-//--    case 0x14: /* ADC Ib, AL */
-//--       delta = dis_op_imm_A( 1, ADC, True, delta, "adc" );
-//--       break;
+   case 0x14: /* ADC Ib, AL */
+      delta = dis_op_imm_A(  1, True, Iop_Add8, True, delta, "adc" );
+      break;
    case 0x15: /* ADC Iv, eAX */
-      delta = dis_op_imm_A( sz, True,  Iop_Add8, True, delta, "adc" );
+      delta = dis_op_imm_A( sz, True, Iop_Add8, True, delta, "adc" );
       break;
 
 //--    case 0x1C: /* SBB Ib, AL */