x86/mm: Carve out INVLPG inline asm for use by others

No functional changes.

Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/ZyulbYuvrkshfsd2@antipodes

diff --git a/arch/x86/include/asm/tlb.h b/arch/x86/include/asm/tlb.h
index 580636cdc257b78930db0d9b9236cfa9fd62ed21..4d3c9d00d6b6b2e08617e068f449ac8564f203a6 100644 (file)
--- a/arch/x86/include/asm/tlb.h
+++ b/arch/x86/include/asm/tlb.h
@@ -34,4 +34,8 @@ static inline void __tlb_remove_table(void *table)
        free_page_and_swap_cache(table);
 }
 
+static inline void invlpg(unsigned long addr)
+{
+       asm volatile("invlpg (%0)" ::"r" (addr) : "memory");
+}
 #endif /* _ASM_X86_TLB_H */

diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index b0d5a644fc84dc2c405d42bb102fd20873441744..a2becb85bea79689439fb1ebe43f2d20d4957953 100644 (file)
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -20,6 +20,7 @@
 #include <asm/cacheflush.h>
 #include <asm/apic.h>
 #include <asm/perf_event.h>
+#include <asm/tlb.h>
 
 #include "mm_internal.h"
 
@@ -1140,7 +1141,7 @@ STATIC_NOPV void native_flush_tlb_one_user(unsigned long addr)
        bool cpu_pcide;
 
        /* Flush 'addr' from the kernel PCID: */
-       asm volatile("invlpg (%0)" ::"r" (addr) : "memory");
+       invlpg(addr);
 
        /* If PTI is off there is no user PCID and nothing to flush. */
        if (!static_cpu_has(X86_FEATURE_PTI))