they were breaking the build.
+++ /dev/null
-From ddf42d068f8802de122bb7efdfcb3179336053f1 Mon Sep 17 00:00:00 2001
-From: Marc Zyngier <marc.zyngier@arm.com>
-Date: Tue, 2 May 2017 14:30:39 +0100
-Subject: KVM: arm/arm64: vgic-v2: Do not use Active+Pending state for a HW interrupt
-
-From: Marc Zyngier <marc.zyngier@arm.com>
-
-commit ddf42d068f8802de122bb7efdfcb3179336053f1 upstream.
-
-When an interrupt is injected with the HW bit set (indicating that
-deactivation should be propagated to the physical distributor),
-special care must be taken so that we never mark the corresponding
-LR with the Active+Pending state (as the pending state is kept in
-the physycal distributor).
-
-Fixes: 140b086dd197 ("KVM: arm/arm64: vgic-new: Add GICv2 world switch backend")
-Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
-Reviewed-by: Christoffer Dall <cdall@linaro.org>
-Signed-off-by: Christoffer Dall <cdall@linaro.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- virt/kvm/arm/vgic/vgic-v2.c | 7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/virt/kvm/arm/vgic/vgic-v2.c
-+++ b/virt/kvm/arm/vgic/vgic-v2.c
-@@ -168,6 +168,13 @@ void vgic_v2_populate_lr(struct kvm_vcpu
- if (irq->hw) {
- val |= GICH_LR_HW;
- val |= irq->hwintid << GICH_LR_PHYSID_CPUID_SHIFT;
-+ /*
-+ * Never set pending+active on a HW interrupt, as the
-+ * pending state is kept at the physical distributor
-+ * level.
-+ */
-+ if (irq->active && irq_is_pending(irq))
-+ val &= ~GICH_LR_PENDING_BIT;
- } else {
- if (irq->config == VGIC_CONFIG_LEVEL)
- val |= GICH_LR_EOI;
+++ /dev/null
-From 3d6e77ad1489650afa20da92bb589c8778baa8da Mon Sep 17 00:00:00 2001
-From: Marc Zyngier <marc.zyngier@arm.com>
-Date: Tue, 2 May 2017 14:30:40 +0100
-Subject: KVM: arm/arm64: vgic-v3: Do not use Active+Pending state for a HW interrupt
-
-From: Marc Zyngier <marc.zyngier@arm.com>
-
-commit 3d6e77ad1489650afa20da92bb589c8778baa8da upstream.
-
-When an interrupt is injected with the HW bit set (indicating that
-deactivation should be propagated to the physical distributor),
-special care must be taken so that we never mark the corresponding
-LR with the Active+Pending state (as the pending state is kept in
-the physycal distributor).
-
-Fixes: 59529f69f504 ("KVM: arm/arm64: vgic-new: Add GICv3 world switch backend")
-Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
-Reviewed-by: Christoffer Dall <cdall@linaro.org>
-Signed-off-by: Christoffer Dall <cdall@linaro.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- virt/kvm/arm/vgic/vgic-v3.c | 7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/virt/kvm/arm/vgic/vgic-v3.c
-+++ b/virt/kvm/arm/vgic/vgic-v3.c
-@@ -151,6 +151,13 @@ void vgic_v3_populate_lr(struct kvm_vcpu
- if (irq->hw) {
- val |= ICH_LR_HW;
- val |= ((u64)irq->hwintid) << ICH_LR_PHYS_ID_SHIFT;
-+ /*
-+ * Never set pending+active on a HW interrupt, as the
-+ * pending state is kept at the physical distributor
-+ * level.
-+ */
-+ if (irq->active && irq_is_pending(irq))
-+ val &= ~ICH_LR_PENDING_BIT;
- } else {
- if (irq->config == VGIC_CONFIG_LEVEL)
- val |= ICH_LR_EOI;
powerpc-tm-fix-fp-and-vmx-register-corruption.patch
arm64-kvm-do-not-use-stack-protector-to-compile-el2-code.patch
arm-kvm-do-not-use-stack-protector-to-compile-hyp-code.patch
-kvm-arm-arm64-vgic-v2-do-not-use-active-pending-state-for-a-hw-interrupt.patch
-kvm-arm-arm64-vgic-v3-do-not-use-active-pending-state-for-a-hw-interrupt.patch
kvm-arm-plug-potential-guest-hardware-debug-leakage.patch
arm-8662-1-module-split-core-and-init-plt-sections.patch
arm-8670-1-v7m-do-not-corrupt-vector-table-around-v7m_invalidate_l1-call.patch