4.14-stable patches

added patches:
	x86-i8259-mark-legacy-pic-interrupts-with-irq_level.patch

diff --git a/queue-4.14/series b/queue-4.14/series
index dfb89b02ef6dd3a95d008fa40d227ace9c598f1d..4018a418af16e0a048e57bbe512f8ec8482e0563 100644 (file)
--- a/queue-4.14/series
+++ b/queue-4.14/series
@@ -36,3 +36,4 @@ sctp-fail-if-no-bound-addresses-can-be-used-for-a-gi.patch
 net-ravb-fix-possible-hang-if-ris2_qff1-happen.patch
 net-tg3-resolve-deadlock-in-tg3_reset_task-during-ee.patch
 revert-input-synaptics-switch-touchpad-on-hp-laptop-15-da3001tu-to-rmi-mode.patch
+x86-i8259-mark-legacy-pic-interrupts-with-irq_level.patch

diff --git a/queue-4.14/x86-i8259-mark-legacy-pic-interrupts-with-irq_level.patch b/queue-4.14/x86-i8259-mark-legacy-pic-interrupts-with-irq_level.patch
new file mode 100644 (file)
index 0000000..51b7a89
--- /dev/null
+++ b/queue-4.14/x86-i8259-mark-legacy-pic-interrupts-with-irq_level.patch
@@ -0,0 +1,61 @@
+From 5fa55950729d0762a787451dc52862c3f850f859 Mon Sep 17 00:00:00 2001
+From: Thomas Gleixner <tglx@linutronix.de>
+Date: Mon, 9 Jan 2023 22:57:13 +0100
+Subject: x86/i8259: Mark legacy PIC interrupts with IRQ_LEVEL
+
+From: Thomas Gleixner <tglx@linutronix.de>
+
+commit 5fa55950729d0762a787451dc52862c3f850f859 upstream.
+
+Baoquan reported that after triggering a crash the subsequent crash-kernel
+fails to boot about half of the time. It triggers a NULL pointer
+dereference in the periodic tick code.
+
+This happens because the legacy timer interrupt (IRQ0) is resent in
+software which happens in soft interrupt (tasklet) context. In this context
+get_irq_regs() returns NULL which leads to the NULL pointer dereference.
+
+The reason for the resend is a spurious APIC interrupt on the IRQ0 vector
+which is captured and leads to a resend when the legacy timer interrupt is
+enabled. This is wrong because the legacy PIC interrupts are level
+triggered and therefore should never be resent in software, but nothing
+ever sets the IRQ_LEVEL flag on those interrupts, so the core code does not
+know about their trigger type.
+
+Ensure that IRQ_LEVEL is set when the legacy PCI interrupts are set up.
+
+Fixes: a4633adcdbc1 ("[PATCH] genirq: add genirq sw IRQ-retrigger")
+Reported-by: Baoquan He <bhe@redhat.com>
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Tested-by: Baoquan He <bhe@redhat.com>
+Link: https://lore.kernel.org/r/87mt6rjrra.ffs@tglx
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/kernel/i8259.c   |    1 +
+ arch/x86/kernel/irqinit.c |    4 +++-
+ 2 files changed, 4 insertions(+), 1 deletion(-)
+
+--- a/arch/x86/kernel/i8259.c
++++ b/arch/x86/kernel/i8259.c
+@@ -114,6 +114,7 @@ static void make_8259A_irq(unsigned int
+       disable_irq_nosync(irq);
+       io_apic_irqs &= ~(1<<irq);
+       irq_set_chip_and_handler(irq, &i8259A_chip, handle_level_irq);
++      irq_set_status_flags(irq, IRQ_LEVEL);
+       enable_irq(irq);
+ }
+ 
+--- a/arch/x86/kernel/irqinit.c
++++ b/arch/x86/kernel/irqinit.c
+@@ -67,8 +67,10 @@ void __init init_ISA_irqs(void)
+ #endif
+       legacy_pic->init(0);
+ 
+-      for (i = 0; i < nr_legacy_irqs(); i++)
++      for (i = 0; i < nr_legacy_irqs(); i++) {
+               irq_set_chip_and_handler(i, chip, handle_level_irq);
++              irq_set_status_flags(i, IRQ_LEVEL);
++      }
+ }
+ 
+ void __init init_IRQ(void)