Fix the --disable-tcg breakage introduced by tb_lock's removal by
relying on the fact that tcg_enabled() is set to 0 at
compile-time under --disable-tcg.
While at it, add further asserts to fix builds that enable both
--disable-tcg and --enable-debug, which were broken even before
tb_lock's removal.
Tested to build x86_64-softmmu and i386-softmmu targets.
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
{
}
-void tb_unlock(void)
-{
-}
-
void tlb_set_dirty(CPUState *cpu, target_ulong vaddr)
{
}
int64_t ti;
#endif
+ assert(tcg_enabled());
#ifdef CONFIG_PROFILER
ti = profile_getclock();
#endif
{
CPUState *cpu = arg;
+ assert(tcg_enabled());
rcu_register_thread();
tcg_register_thread();
{
CPUState *cpu = arg;
+ assert(tcg_enabled());
g_assert(!use_icount);
rcu_register_thread();
static QemuThread *single_tcg_cpu_thread;
static int tcg_region_inited;
+ assert(tcg_enabled());
/*
* Initialize TCG regions--once. Now is a good time, because:
* (1) TCG's init context, prologue and target globals have been set up.
RAMBlock *block;
ram_addr_t end;
+ assert(tcg_enabled());
end = TARGET_PAGE_ALIGN(start + length);
start &= TARGET_PAGE_MASK;
void memory_notdirty_write_complete(NotDirtyInfo *ndi)
{
if (ndi->pages) {
+ assert(tcg_enabled());
page_collection_unlock(ndi->pages);
ndi->pages = NULL;
}
CPUAddressSpace *cpuas;
AddressSpaceDispatch *d;
+ assert(tcg_enabled());
/* since each CPU stores ram addresses in its TLB cache, we must
reset the modified entries */
cpuas = container_of(listener, CPUAddressSpace, tcg_as_listener);