{
cmd_len += 2;
*cycles = 4;
- sprintf (op, "0x%04x", dst);
- sprintf (comm, "PC rel. abs addr 0x%04x",
- PS ((short) (addr + 2) + dst));
if (extended_dst)
{
dst |= extended_dst << 16;
sprintf (comm, "PC rel. abs addr 0x%05lx",
(long)((addr + 2 + dst) & 0xfffff));
}
+ else
+ {
+ sprintf (op, "0x%04x", dst);
+ sprintf (comm, "PC rel. abs addr 0x%04x",
+ PS ((short) (addr + 2) + dst));
+ }
}
else
return -1;
{
cmd_len += 2;
*cycles = 4;
- sprintf (op, "&0x%04x", PS (dst));
if (extended_dst)
{
dst |= extended_dst << 16;
sprintf (op, "&0x%05x", dst & 0xfffff);
}
+ else
+ sprintf (op, "&0x%04x", PS (dst));
}
else
return -1;
if (msp430dis_opcode_signed (addr + 2, info, &dst, comm))
{
cmd_len += 2;
- sprintf (op, "#%d", dst);
- if (dst > 9 || dst < 0)
- sprintf (comm, "#0x%04x", PS (dst));
if (extended_dst)
{
dst |= extended_dst << 16;
if (dst > 9 || dst < 0)
sprintf (comm, "#0x%05x", dst);
}
+ else
+ {
+ sprintf (op, "#%d", dst);
+ if (dst > 9 || dst < 0)
+ sprintf (comm, "#0x%04x", PS (dst));
+ }
}
else
return -1;
if (msp430dis_opcode_signed (addr + 2, info, &dst, comm))
{
cmd_len += 2;
- sprintf (op, "0x%04x", PS (dst));
- sprintf (comm, "PC rel. 0x%04x",
- PS ((short) addr + 2 + dst));
if (extended_dst)
{
dst |= extended_dst << 16;
sprintf (comm, "PC rel. 0x%05lx",
(long)((addr + 2 + dst) & 0xfffff));
}
+ else
+ {
+ sprintf (op, "0x%04x", PS (dst));
+ sprintf (comm, "PC rel. 0x%04x",
+ PS ((short) addr + 2 + dst));
+ }
}
else
return -1;
if (msp430dis_opcode_signed (addr + 2, info, &dst, comm))
{
cmd_len += 2;
- sprintf (op, "&0x%04x", PS (dst));
if (extended_dst)
{
dst |= extended_dst << 16;
sprintf (op, "&0x%05x", dst & 0xfffff);
}
+ else
+ sprintf (op, "&0x%04x", PS (dst));
}
else
return -1;