]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
fixes for 4.9
authorSasha Levin <sashal@kernel.org>
Tue, 22 Oct 2019 17:34:23 +0000 (13:34 -0400)
committerSasha Levin <sashal@kernel.org>
Tue, 22 Oct 2019 17:34:23 +0000 (13:34 -0400)
Signed-off-by: Sasha Levin <sashal@kernel.org>
queue-4.9/mips-elf_hwcap-export-userspace-ases.patch [new file with mode: 0644]
queue-4.9/mips-treat-loongson-extensions-as-ases.patch [new file with mode: 0644]
queue-4.9/series

diff --git a/queue-4.9/mips-elf_hwcap-export-userspace-ases.patch b/queue-4.9/mips-elf_hwcap-export-userspace-ases.patch
new file mode 100644 (file)
index 0000000..a323264
--- /dev/null
@@ -0,0 +1,95 @@
+From 3b7d85db5047dfd98676694c05acd9bde4eefc5c Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 22 Oct 2019 00:49:56 +0800
+Subject: MIPS: elf_hwcap: Export userspace ASEs
+
+From: Jiaxun Yang <jiaxun.yang@flygoat.com>
+
+[ Upstream commit 38dffe1e4dde1d3174fdce09d67370412843ebb5 ]
+
+A Golang developer reported MIPS hwcap isn't reflecting instructions
+that the processor actually supported so programs can't apply optimized
+code at runtime.
+
+Thus we export the ASEs that can be used in userspace programs.
+
+Reported-by: Meng Zhuo <mengzhuo1203@gmail.com>
+Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
+Cc: linux-mips@vger.kernel.org
+Cc: Paul Burton <paul.burton@mips.com>
+Cc: <stable@vger.kernel.org> # 4.14+
+Signed-off-by: Paul Burton <paul.burton@mips.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/mips/include/uapi/asm/hwcap.h | 11 ++++++++++
+ arch/mips/kernel/cpu-probe.c       | 33 ++++++++++++++++++++++++++++++
+ 2 files changed, 44 insertions(+)
+
+diff --git a/arch/mips/include/uapi/asm/hwcap.h b/arch/mips/include/uapi/asm/hwcap.h
+index c7484a7ca686d..2b6f8d569d00f 100644
+--- a/arch/mips/include/uapi/asm/hwcap.h
++++ b/arch/mips/include/uapi/asm/hwcap.h
+@@ -4,5 +4,16 @@
+ /* HWCAP flags */
+ #define HWCAP_MIPS_R6         (1 << 0)
+ #define HWCAP_MIPS_MSA                (1 << 1)
++#define HWCAP_MIPS_MIPS16     (1 << 3)
++#define HWCAP_MIPS_MDMX     (1 << 4)
++#define HWCAP_MIPS_MIPS3D   (1 << 5)
++#define HWCAP_MIPS_SMARTMIPS (1 << 6)
++#define HWCAP_MIPS_DSP      (1 << 7)
++#define HWCAP_MIPS_DSP2     (1 << 8)
++#define HWCAP_MIPS_DSP3     (1 << 9)
++#define HWCAP_MIPS_MIPS16E2 (1 << 10)
++#define HWCAP_LOONGSON_MMI  (1 << 11)
++#define HWCAP_LOONGSON_EXT  (1 << 12)
++#define HWCAP_LOONGSON_EXT2 (1 << 13)
+ #endif /* _UAPI_ASM_HWCAP_H */
+diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
+index 0a7b3e513650f..1a1ab0a78ac05 100644
+--- a/arch/mips/kernel/cpu-probe.c
++++ b/arch/mips/kernel/cpu-probe.c
+@@ -2055,6 +2055,39 @@ void cpu_probe(void)
+               elf_hwcap |= HWCAP_MIPS_MSA;
+       }
++      if (cpu_has_mips16)
++              elf_hwcap |= HWCAP_MIPS_MIPS16;
++
++      if (cpu_has_mdmx)
++              elf_hwcap |= HWCAP_MIPS_MDMX;
++
++      if (cpu_has_mips3d)
++              elf_hwcap |= HWCAP_MIPS_MIPS3D;
++
++      if (cpu_has_smartmips)
++              elf_hwcap |= HWCAP_MIPS_SMARTMIPS;
++
++      if (cpu_has_dsp)
++              elf_hwcap |= HWCAP_MIPS_DSP;
++
++      if (cpu_has_dsp2)
++              elf_hwcap |= HWCAP_MIPS_DSP2;
++
++      if (cpu_has_dsp3)
++              elf_hwcap |= HWCAP_MIPS_DSP3;
++
++      if (cpu_has_loongson_mmi)
++              elf_hwcap |= HWCAP_LOONGSON_MMI;
++
++      if (cpu_has_loongson_mmi)
++              elf_hwcap |= HWCAP_LOONGSON_CAM;
++
++      if (cpu_has_loongson_ext)
++              elf_hwcap |= HWCAP_LOONGSON_EXT;
++
++      if (cpu_has_loongson_ext)
++              elf_hwcap |= HWCAP_LOONGSON_EXT2;
++
+       if (cpu_has_vz)
+               cpu_probe_vz(c);
+-- 
+2.20.1
+
diff --git a/queue-4.9/mips-treat-loongson-extensions-as-ases.patch b/queue-4.9/mips-treat-loongson-extensions-as-ases.patch
new file mode 100644 (file)
index 0000000..bac1ab8
--- /dev/null
@@ -0,0 +1,115 @@
+From f6ad531d5c4db65228c4fd39660f4b4824019d8e Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 22 Oct 2019 00:49:55 +0800
+Subject: MIPS: Treat Loongson Extensions as ASEs
+
+From: Jiaxun Yang <jiaxun.yang@flygoat.com>
+
+[ Upstream commit d2f965549006acb865c4638f1f030ebcefdc71f6 ]
+
+Recently, binutils had split Loongson-3 Extensions into four ASEs:
+MMI, CAM, EXT, EXT2. This patch do the samething in kernel and expose
+them in cpuinfo so applications can probe supported ASEs at runtime.
+
+Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
+Cc: Huacai Chen <chenhc@lemote.com>
+Cc: Yunqiang Su <ysu@wavecomp.com>
+Cc: stable@vger.kernel.org # v4.14+
+Signed-off-by: Paul Burton <paul.burton@mips.com>
+Cc: linux-mips@vger.kernel.org
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/mips/include/asm/cpu-features.h | 16 ++++++++++++++++
+ arch/mips/include/asm/cpu.h          |  4 ++++
+ arch/mips/kernel/cpu-probe.c         |  4 ++++
+ arch/mips/kernel/proc.c              |  4 ++++
+ 4 files changed, 28 insertions(+)
+
+diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
+index e961c8a7ea662..8c8b92b9b1eeb 100644
+--- a/arch/mips/include/asm/cpu-features.h
++++ b/arch/mips/include/asm/cpu-features.h
+@@ -345,6 +345,22 @@
+ #define cpu_has_dsp3          (cpu_data[0].ases & MIPS_ASE_DSP3)
+ #endif
++#ifndef cpu_has_loongson_mmi
++#define cpu_has_loongson_mmi          __ase(MIPS_ASE_LOONGSON_MMI)
++#endif
++
++#ifndef cpu_has_loongson_cam
++#define cpu_has_loongson_cam          __ase(MIPS_ASE_LOONGSON_CAM)
++#endif
++
++#ifndef cpu_has_loongson_ext
++#define cpu_has_loongson_ext          __ase(MIPS_ASE_LOONGSON_EXT)
++#endif
++
++#ifndef cpu_has_loongson_ext2
++#define cpu_has_loongson_ext2         __ase(MIPS_ASE_LOONGSON_EXT2)
++#endif
++
+ #ifndef cpu_has_mipsmt
+ #define cpu_has_mipsmt                (cpu_data[0].ases & MIPS_ASE_MIPSMT)
+ #endif
+diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
+index 9a8372484edc0..2cd5ee7463605 100644
+--- a/arch/mips/include/asm/cpu.h
++++ b/arch/mips/include/asm/cpu.h
+@@ -429,5 +429,9 @@ enum cpu_type_enum {
+ #define MIPS_ASE_VZ           0x00000080 /* Virtualization ASE */
+ #define MIPS_ASE_MSA          0x00000100 /* MIPS SIMD Architecture */
+ #define MIPS_ASE_DSP3         0x00000200 /* Signal Processing ASE Rev 3*/
++#define MIPS_ASE_LOONGSON_MMI 0x00000800 /* Loongson MultiMedia extensions Instructions */
++#define MIPS_ASE_LOONGSON_CAM 0x00001000 /* Loongson CAM */
++#define MIPS_ASE_LOONGSON_EXT 0x00002000 /* Loongson EXTensions */
++#define MIPS_ASE_LOONGSON_EXT2        0x00004000 /* Loongson EXTensions R2 */
+ #endif /* _ASM_CPU_H */
+diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
+index 921211bcd2bad..0a7b3e513650f 100644
+--- a/arch/mips/kernel/cpu-probe.c
++++ b/arch/mips/kernel/cpu-probe.c
+@@ -1480,6 +1480,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
+                       __cpu_name[cpu] = "ICT Loongson-3";
+                       set_elf_platform(cpu, "loongson3a");
+                       set_isa(c, MIPS_CPU_ISA_M64R1);
++                      c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_EXT);
+                       break;
+               case PRID_REV_LOONGSON3B_R1:
+               case PRID_REV_LOONGSON3B_R2:
+@@ -1487,6 +1488,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
+                       __cpu_name[cpu] = "ICT Loongson-3";
+                       set_elf_platform(cpu, "loongson3b");
+                       set_isa(c, MIPS_CPU_ISA_M64R1);
++                      c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_EXT);
+                       break;
+               }
+@@ -1826,6 +1828,8 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
+               decode_configs(c);
+               c->options |= MIPS_CPU_FTLB | MIPS_CPU_TLBINV | MIPS_CPU_LDPTE;
+               c->writecombine = _CACHE_UNCACHED_ACCELERATED;
++              c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
++                      MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2);
+               break;
+       default:
+               panic("Unknown Loongson Processor ID!");
+diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
+index 4c01ee5b88c99..dd05ec89cc57e 100644
+--- a/arch/mips/kernel/proc.c
++++ b/arch/mips/kernel/proc.c
+@@ -122,6 +122,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
+       if (cpu_has_eva)        seq_printf(m, "%s", " eva");
+       if (cpu_has_htw)        seq_printf(m, "%s", " htw");
+       if (cpu_has_xpa)        seq_printf(m, "%s", " xpa");
++      if (cpu_has_loongson_mmi)       seq_printf(m, "%s", " loongson-mmi");
++      if (cpu_has_loongson_cam)       seq_printf(m, "%s", " loongson-cam");
++      if (cpu_has_loongson_ext)       seq_printf(m, "%s", " loongson-ext");
++      if (cpu_has_loongson_ext2)      seq_printf(m, "%s", " loongson-ext2");
+       seq_printf(m, "\n");
+       if (cpu_has_mmips) {
+-- 
+2.20.1
+
index 88cd7eab76bc1c7aebbeb8dae34a14fce0a35568..c9b3cdbd9a950f6fdeea3c2fb438514a09a79597 100644 (file)
@@ -11,3 +11,5 @@ net-hisilicon-fix-usage-of-uninitialized-variable-in.patch
 namespace-fix-namespace.pl-script-to-support-relativ.patch
 revert-drm-radeon-fix-eeh-during-kexec.patch
 ocfs2-fix-panic-due-to-ocfs2_wq-is-null.patch
+mips-treat-loongson-extensions-as-ases.patch
+mips-elf_hwcap-export-userspace-ases.patch