--- /dev/null
+From b14fba7ebd04082f7767a11daea7f12f3593de22 Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Tue, 5 May 2020 10:42:09 +0300
+Subject: carl9170: remove P2P_GO support
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Christian Lamparter <chunkeey@gmail.com>
+
+commit b14fba7ebd04082f7767a11daea7f12f3593de22 upstream.
+
+This patch follows up on a bug-report by Frank Schäfer that
+discovered P2P GO wasn't working with wpa_supplicant.
+This patch removes part of the broken P2P GO support but
+keeps the vif switchover code in place.
+
+Cc: <stable@vger.kernel.org>
+Link: <https://lkml.kernel.org/r/3a9d86b6-744f-e670-8792-9167257edef8@googlemail.com>
+Reported-by: Frank Schäfer <fschaefer.oss@googlemail.com>
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
+Link: https://lore.kernel.org/r/20200425092811.9494-1-chunkeey@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/wireless/ath/carl9170/fw.c | 4 +---
+ drivers/net/wireless/ath/carl9170/main.c | 21 ++++-----------------
+ 2 files changed, 5 insertions(+), 20 deletions(-)
+
+--- a/drivers/net/wireless/ath/carl9170/fw.c
++++ b/drivers/net/wireless/ath/carl9170/fw.c
+@@ -338,9 +338,7 @@ static int carl9170_fw(struct ar9170 *ar
+ ar->hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_ADHOC);
+
+ if (SUPP(CARL9170FW_WLANTX_CAB)) {
+- if_comb_types |=
+- BIT(NL80211_IFTYPE_AP) |
+- BIT(NL80211_IFTYPE_P2P_GO);
++ if_comb_types |= BIT(NL80211_IFTYPE_AP);
+
+ #ifdef CONFIG_MAC80211_MESH
+ if_comb_types |=
+--- a/drivers/net/wireless/ath/carl9170/main.c
++++ b/drivers/net/wireless/ath/carl9170/main.c
+@@ -582,11 +582,10 @@ static int carl9170_init_interface(struc
+ ar->disable_offload |= ((vif->type != NL80211_IFTYPE_STATION) &&
+ (vif->type != NL80211_IFTYPE_AP));
+
+- /* While the driver supports HW offload in a single
+- * P2P client configuration, it doesn't support HW
+- * offload in the favourit, concurrent P2P GO+CLIENT
+- * configuration. Hence, HW offload will always be
+- * disabled for P2P.
++ /* The driver used to have P2P GO+CLIENT support,
++ * but since this was dropped and we don't know if
++ * there are any gremlins lurking in the shadows,
++ * so best we keep HW offload disabled for P2P.
+ */
+ ar->disable_offload |= vif->p2p;
+
+@@ -639,18 +638,6 @@ static int carl9170_op_add_interface(str
+ if (vif->type == NL80211_IFTYPE_STATION)
+ break;
+
+- /* P2P GO [master] use-case
+- * Because the P2P GO station is selected dynamically
+- * by all participating peers of a WIFI Direct network,
+- * the driver has be able to change the main interface
+- * operating mode on the fly.
+- */
+- if (main_vif->p2p && vif->p2p &&
+- vif->type == NL80211_IFTYPE_AP) {
+- old_main = main_vif;
+- break;
+- }
+-
+ err = -EBUSY;
+ rcu_read_unlock();
+
--- /dev/null
+From 25259f7a5de2de9d67793dc584b15c83a3134c93 Mon Sep 17 00:00:00 2001
+From: Michael Ellerman <mpe@ellerman.id.au>
+Date: Sun, 26 Apr 2020 22:43:56 +1000
+Subject: clocksource/drivers/timer-microchip-pit64b: Select CONFIG_TIMER_OF
+
+From: Michael Ellerman <mpe@ellerman.id.au>
+
+commit 25259f7a5de2de9d67793dc584b15c83a3134c93 upstream.
+
+This driver is an OF driver, it depends on OF, and uses
+TIMER_OF_DECLARE, so it should select CONFIG_TIMER_OF.
+
+Without CONFIG_TIMER_OF enabled this can lead to warnings such as:
+
+ powerpc-linux-ld: warning: orphan section `__timer_of_table' from
+ `drivers/clocksource/timer-microchip-pit64b.o' being placed in
+ section `__timer_of_table'.
+
+Because TIMER_OF_TABLES in vmlinux.lds.h doesn't emit anything into
+the linker script when CONFIG_TIMER_OF is not enabled.
+
+Fixes: 625022a5f160 ("clocksource/drivers/timer-microchip-pit64b: Add Microchip PIT64B support")
+Cc: stable@vger.kernel.org # v5.6+
+Reported-by: kbuild test robot <lkp@intel.com>
+Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+Link: https://lore.kernel.org/r/20200426124356.3929682-1-mpe@ellerman.id.au
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/clocksource/Kconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/clocksource/Kconfig
++++ b/drivers/clocksource/Kconfig
+@@ -709,6 +709,7 @@ config MICROCHIP_PIT64B
+ bool "Microchip PIT64B support"
+ depends on OF || COMPILE_TEST
+ select CLKSRC_MMIO
++ select TIMER_OF
+ help
+ This option enables Microchip PIT64B timer for Atmel
+ based system. It supports the oneshot, the periodic
--- /dev/null
+From c7f3d43b629b598a2bb9ec3524e844eae7492e7e Mon Sep 17 00:00:00 2001
+From: Thomas Gleixner <tglx@linutronix.de>
+Date: Sat, 6 Jun 2020 23:51:15 +0200
+Subject: clocksource: Remove obsolete ifdef
+
+From: Thomas Gleixner <tglx@linutronix.de>
+
+commit c7f3d43b629b598a2bb9ec3524e844eae7492e7e upstream.
+
+CONFIG_GENERIC_VDSO_CLOCK_MODE was a transitional config switch which got
+removed after all architectures got converted to the new storage model.
+
+But the removal forgot to remove the #ifdef which guards the
+vdso_clock_mode sanity check, which effectively disables the sanity check.
+
+Remove it now.
+
+Fixes: f86fd32db706 ("lib/vdso: Cleanup clock mode storage leftovers")
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Tested-by: Miklos Szeredi <mszeredi@redhat.com>
+Cc: stable@vger.kernel.org
+Link: https://lkml.kernel.org/r/20200606221531.845475036@linutronix.de
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ kernel/time/clocksource.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/kernel/time/clocksource.c
++++ b/kernel/time/clocksource.c
+@@ -928,14 +928,12 @@ int __clocksource_register_scale(struct
+
+ clocksource_arch_init(cs);
+
+-#ifdef CONFIG_GENERIC_VDSO_CLOCK_MODE
+ if (cs->vdso_clock_mode < 0 ||
+ cs->vdso_clock_mode >= VDSO_CLOCKMODE_MAX) {
+ pr_warn("clocksource %s registered with invalid VDSO mode %d. Disabling VDSO support.\n",
+ cs->name, cs->vdso_clock_mode);
+ cs->vdso_clock_mode = VDSO_CLOCKMODE_NONE;
+ }
+-#endif
+
+ /* Initialize mult/shift and max_idle_ns */
+ __clocksource_update_freq_scale(cs, scale, freq);
--- /dev/null
+From f29801030ac67bf98b7a65d3aea67b30769d4f7c Mon Sep 17 00:00:00 2001
+From: Kai-Heng Feng <kai.heng.feng@canonical.com>
+Date: Thu, 7 May 2020 22:21:07 +0800
+Subject: e1000e: Disable TSO for buffer overrun workaround
+
+From: Kai-Heng Feng <kai.heng.feng@canonical.com>
+
+commit f29801030ac67bf98b7a65d3aea67b30769d4f7c upstream.
+
+Commit b10effb92e27 ("e1000e: fix buffer overrun while the I219 is
+processing DMA transactions") imposes roughly 30% performance penalty.
+
+The commit log states that "Disabling TSO eliminates performance loss
+for TCP traffic without a noticeable impact on CPU performance", so
+let's disable TSO by default to regain the loss.
+
+CC: stable <stable@vger.kernel.org>
+Fixes: b10effb92e27 ("e1000e: fix buffer overrun while the I219 is processing DMA transactions")
+BugLink: https://bugs.launchpad.net/bugs/1802691
+Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
+Tested-by: Aaron Brown <aaron.f.brown@intel.com>
+Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/ethernet/intel/e1000e/netdev.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/net/ethernet/intel/e1000e/netdev.c
++++ b/drivers/net/ethernet/intel/e1000e/netdev.c
+@@ -5294,6 +5294,10 @@ static void e1000_watchdog_task(struct w
+ /* oops */
+ break;
+ }
++ if (hw->mac.type == e1000_pch_spt) {
++ netdev->features &= ~NETIF_F_TSO;
++ netdev->features &= ~NETIF_F_TSO6;
++ }
+ }
+
+ /* enable transmits in the hardware, need to do this
--- /dev/null
+From d601afcae2febc49665008e9a79e701248d56c50 Mon Sep 17 00:00:00 2001
+From: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
+Date: Fri, 15 May 2020 13:31:27 +0900
+Subject: e1000e: Relax condition to trigger reset for ME workaround
+
+From: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
+
+commit d601afcae2febc49665008e9a79e701248d56c50 upstream.
+
+It's an error if the value of the RX/TX tail descriptor does not match
+what was written. The error condition is true regardless the duration
+of the interference from ME. But the driver only performs the reset if
+E1000_ICH_FWSM_PCIM2PCI_COUNT (2000) iterations of 50us delay have
+transpired. The extra condition can lead to inconsistency between the
+state of hardware as expected by the driver.
+
+Fix this by dropping the check for number of delay iterations.
+
+While at it, also make __ew32_prepare() static as it's not used
+anywhere else.
+
+CC: stable <stable@vger.kernel.org>
+Signed-off-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
+Reviewed-by: Alexander Duyck <alexander.h.duyck@linux.intel.com>
+Tested-by: Aaron Brown <aaron.f.brown@intel.com>
+Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/net/ethernet/intel/e1000e/e1000.h | 1 -
+ drivers/net/ethernet/intel/e1000e/netdev.c | 12 +++++-------
+ 2 files changed, 5 insertions(+), 8 deletions(-)
+
+--- a/drivers/net/ethernet/intel/e1000e/e1000.h
++++ b/drivers/net/ethernet/intel/e1000e/e1000.h
+@@ -576,7 +576,6 @@ static inline u32 __er32(struct e1000_hw
+
+ #define er32(reg) __er32(hw, E1000_##reg)
+
+-s32 __ew32_prepare(struct e1000_hw *hw);
+ void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val);
+
+ #define ew32(reg, val) __ew32(hw, E1000_##reg, (val))
+--- a/drivers/net/ethernet/intel/e1000e/netdev.c
++++ b/drivers/net/ethernet/intel/e1000e/netdev.c
+@@ -119,14 +119,12 @@ static const struct e1000_reg_info e1000
+ * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
+ * and try again a number of times.
+ **/
+-s32 __ew32_prepare(struct e1000_hw *hw)
++static void __ew32_prepare(struct e1000_hw *hw)
+ {
+ s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
+
+ while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
+ udelay(50);
+-
+- return i;
+ }
+
+ void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
+@@ -607,11 +605,11 @@ static void e1000e_update_rdt_wa(struct
+ {
+ struct e1000_adapter *adapter = rx_ring->adapter;
+ struct e1000_hw *hw = &adapter->hw;
+- s32 ret_val = __ew32_prepare(hw);
+
++ __ew32_prepare(hw);
+ writel(i, rx_ring->tail);
+
+- if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
++ if (unlikely(i != readl(rx_ring->tail))) {
+ u32 rctl = er32(RCTL);
+
+ ew32(RCTL, rctl & ~E1000_RCTL_EN);
+@@ -624,11 +622,11 @@ static void e1000e_update_tdt_wa(struct
+ {
+ struct e1000_adapter *adapter = tx_ring->adapter;
+ struct e1000_hw *hw = &adapter->hw;
+- s32 ret_val = __ew32_prepare(hw);
+
++ __ew32_prepare(hw);
+ writel(i, tx_ring->tail);
+
+- if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
++ if (unlikely(i != readl(tx_ring->tail))) {
+ u32 tctl = er32(TCTL);
+
+ ew32(TCTL, tctl & ~E1000_TCTL_EN);
--- /dev/null
+From 2458ed31e9b9ab40d78a452ab2650a0857556e85 Mon Sep 17 00:00:00 2001
+From: Anup Patel <anup.patel@wdc.com>
+Date: Mon, 18 May 2020 14:44:39 +0530
+Subject: irqchip/sifive-plic: Set default irq affinity in plic_irqdomain_map()
+
+From: Anup Patel <anup.patel@wdc.com>
+
+commit 2458ed31e9b9ab40d78a452ab2650a0857556e85 upstream.
+
+For multiple PLIC instances, each PLIC can only target a subset of
+CPUs which is represented by "lmask" in the "struct plic_priv".
+
+Currently, the default irq affinity for each PLIC interrupt is all
+online CPUs which is illegal value for default irq affinity when we
+have multiple PLIC instances. To fix this, we now set "lmask" as the
+default irq affinity in for each interrupt in plic_irqdomain_map().
+
+Fixes: f1ad1133b18f ("irqchip/sifive-plic: Add support for multiple PLICs")
+Signed-off-by: Anup Patel <anup.patel@wdc.com>
+Signed-off-by: Marc Zyngier <maz@kernel.org>
+Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
+Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
+Cc: stable@vger.kernel.org
+Link: https://lore.kernel.org/r/20200518091441.94843-2-anup.patel@wdc.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/irqchip/irq-sifive-plic.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/irqchip/irq-sifive-plic.c
++++ b/drivers/irqchip/irq-sifive-plic.c
+@@ -176,9 +176,12 @@ static struct irq_chip plic_chip = {
+ static int plic_irqdomain_map(struct irq_domain *d, unsigned int irq,
+ irq_hw_number_t hwirq)
+ {
++ struct plic_priv *priv = d->host_data;
++
+ irq_domain_set_info(d, irq, hwirq, &plic_chip, d->host_data,
+ handle_fasteoi_irq, NULL, NULL);
+ irq_set_noprobe(irq);
++ irq_set_affinity(irq, &priv->lmask);
+ return 0;
+ }
+
--- /dev/null
+From 2234ae846ccb9ebdf4c391824cb79e73674dceda Mon Sep 17 00:00:00 2001
+From: Anup Patel <anup.patel@wdc.com>
+Date: Mon, 18 May 2020 14:44:40 +0530
+Subject: irqchip/sifive-plic: Setup cpuhp once after boot CPU handler is present
+
+From: Anup Patel <anup.patel@wdc.com>
+
+commit 2234ae846ccb9ebdf4c391824cb79e73674dceda upstream.
+
+For multiple PLIC instances, the plic_init() is called once for each
+PLIC instance. Due to this we have two issues:
+1. cpuhp_setup_state() is called multiple times
+2. plic_starting_cpu() can crash for boot CPU if cpuhp_setup_state()
+ is called before boot CPU PLIC handler is available.
+
+Address both issues by only initializing the HP notifiers when
+the boot CPU setup is complete.
+
+Fixes: f1ad1133b18f ("irqchip/sifive-plic: Add support for multiple PLICs")
+Signed-off-by: Anup Patel <anup.patel@wdc.com>
+Signed-off-by: Marc Zyngier <maz@kernel.org>
+Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
+Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
+Cc: stable@vger.kernel.org
+Link: https://lore.kernel.org/r/20200518091441.94843-3-anup.patel@wdc.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/irqchip/irq-sifive-plic.c | 14 ++++++++++++--
+ 1 file changed, 12 insertions(+), 2 deletions(-)
+
+--- a/drivers/irqchip/irq-sifive-plic.c
++++ b/drivers/irqchip/irq-sifive-plic.c
+@@ -76,6 +76,7 @@ struct plic_handler {
+ void __iomem *enable_base;
+ struct plic_priv *priv;
+ };
++static bool plic_cpuhp_setup_done;
+ static DEFINE_PER_CPU(struct plic_handler, plic_handlers);
+
+ static inline void plic_toggle(struct plic_handler *handler,
+@@ -285,6 +286,7 @@ static int __init plic_init(struct devic
+ int error = 0, nr_contexts, nr_handlers = 0, i;
+ u32 nr_irqs;
+ struct plic_priv *priv;
++ struct plic_handler *handler;
+
+ priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+@@ -315,7 +317,6 @@ static int __init plic_init(struct devic
+
+ for (i = 0; i < nr_contexts; i++) {
+ struct of_phandle_args parent;
+- struct plic_handler *handler;
+ irq_hw_number_t hwirq;
+ int cpu, hartid;
+
+@@ -369,9 +370,18 @@ done:
+ nr_handlers++;
+ }
+
+- cpuhp_setup_state(CPUHP_AP_IRQ_SIFIVE_PLIC_STARTING,
++ /*
++ * We can have multiple PLIC instances so setup cpuhp state only
++ * when context handler for current/boot CPU is present.
++ */
++ handler = this_cpu_ptr(&plic_handlers);
++ if (handler->present && !plic_cpuhp_setup_done) {
++ cpuhp_setup_state(CPUHP_AP_IRQ_SIFIVE_PLIC_STARTING,
+ "irqchip/sifive/plic:starting",
+ plic_starting_cpu, plic_dying_cpu);
++ plic_cpuhp_setup_done = true;
++ }
++
+ pr_info("mapped %d interrupts with %d handlers for %d contexts.\n",
+ nr_irqs, nr_handlers, nr_contexts);
+ set_handle_irq(plic_handle_irq);
--- /dev/null
+From a8876c22eab9a871834f85de83e98bbf7e6e264d Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Sat, 9 May 2020 22:06:42 +0200
+Subject: media: cedrus: Program output format during each run
+
+From: Samuel Holland <samuel@sholland.org>
+
+commit a8876c22eab9a871834f85de83e98bbf7e6e264d upstream.
+
+Previously, the output format was programmed as part of the ioctl()
+handler. However, this has two problems:
+
+ 1) If there are multiple active streams with different output
+ formats, the hardware will use whichever format was set last
+ for both streams. Similarly, an ioctl() done in an inactive
+ context will wrongly affect other active contexts.
+ 2) The registers are written while the device is not actively
+ streaming. To enable runtime PM tied to the streaming state,
+ all hardware access needs to be moved inside cedrus_device_run().
+
+The call to cedrus_dst_format_set() is now placed just before the
+codec-specific callback that programs the hardware.
+
+Cc: <stable@vger.kernel.org>
+Fixes: 50e761516f2b ("media: platform: Add Cedrus VPU decoder driver")
+Suggested-by: Jernej Skrabec <jernej.skrabec@siol.net>
+Suggested-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
+Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
+Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
+Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
+Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/staging/media/sunxi/cedrus/cedrus_dec.c | 2 ++
+ drivers/staging/media/sunxi/cedrus/cedrus_video.c | 3 ---
+ 2 files changed, 2 insertions(+), 3 deletions(-)
+
+--- a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c
++++ b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c
+@@ -74,6 +74,8 @@ void cedrus_device_run(void *priv)
+
+ v4l2_m2m_buf_copy_metadata(run.src, run.dst, true);
+
++ cedrus_dst_format_set(dev, &ctx->dst_fmt);
++
+ dev->dec_ops[ctx->current_codec]->setup(ctx, &run);
+
+ /* Complete request(s) controls if needed. */
+--- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c
++++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c
+@@ -273,7 +273,6 @@ static int cedrus_s_fmt_vid_cap(struct f
+ struct v4l2_format *f)
+ {
+ struct cedrus_ctx *ctx = cedrus_file2ctx(file);
+- struct cedrus_dev *dev = ctx->dev;
+ struct vb2_queue *vq;
+ int ret;
+
+@@ -287,8 +286,6 @@ static int cedrus_s_fmt_vid_cap(struct f
+
+ ctx->dst_fmt = f->fmt.pix;
+
+- cedrus_dst_format_set(dev, &ctx->dst_fmt);
+-
+ return 0;
+ }
+
--- /dev/null
+From aa0ce96d72dd2e1b0dfd0fb868f82876e7790878 Mon Sep 17 00:00:00 2001
+From: Ashok Raj <ashok.raj@intel.com>
+Date: Fri, 27 Mar 2020 14:16:15 -0700
+Subject: PCI: Program MPS for RCiEP devices
+
+From: Ashok Raj <ashok.raj@intel.com>
+
+commit aa0ce96d72dd2e1b0dfd0fb868f82876e7790878 upstream.
+
+Root Complex Integrated Endpoints (RCiEPs) do not have an upstream bridge,
+so pci_configure_mps() previously ignored them, which may result in reduced
+performance.
+
+Instead, program the Max_Payload_Size of RCiEPs to the maximum supported
+value (unless it is limited for the PCIE_BUS_PEER2PEER case). This also
+affects the subsequent programming of Max_Read_Request_Size because Linux
+programs MRRS based on the MPS value.
+
+Fixes: 9dae3a97297f ("PCI: Move MPS configuration check to pci_configure_device()")
+Link: https://lore.kernel.org/r/1585343775-4019-1-git-send-email-ashok.raj@intel.com
+Tested-by: Dave Jiang <dave.jiang@intel.com>
+Signed-off-by: Ashok Raj <ashok.raj@intel.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/pci/probe.c | 22 +++++++++++++++++++++-
+ 1 file changed, 21 insertions(+), 1 deletion(-)
+
+--- a/drivers/pci/probe.c
++++ b/drivers/pci/probe.c
+@@ -1934,13 +1934,33 @@ static void pci_configure_mps(struct pci
+ struct pci_dev *bridge = pci_upstream_bridge(dev);
+ int mps, mpss, p_mps, rc;
+
+- if (!pci_is_pcie(dev) || !bridge || !pci_is_pcie(bridge))
++ if (!pci_is_pcie(dev))
+ return;
+
+ /* MPS and MRRS fields are of type 'RsvdP' for VFs, short-circuit out */
+ if (dev->is_virtfn)
+ return;
+
++ /*
++ * For Root Complex Integrated Endpoints, program the maximum
++ * supported value unless limited by the PCIE_BUS_PEER2PEER case.
++ */
++ if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) {
++ if (pcie_bus_config == PCIE_BUS_PEER2PEER)
++ mps = 128;
++ else
++ mps = 128 << dev->pcie_mpss;
++ rc = pcie_set_mps(dev, mps);
++ if (rc) {
++ pci_warn(dev, "can't set Max Payload Size to %d; if necessary, use \"pci=pcie_bus_safe\" and report a bug\n",
++ mps);
++ }
++ return;
++ }
++
++ if (!bridge || !pci_is_pcie(bridge))
++ return;
++
+ mps = pcie_get_mps(dev);
+ p_mps = pcie_get_mps(bridge);
+
x86-amd_nb-add-amd-family-17h-model-60h-pci-ids.patch
ima-remove-redundant-policy-rule-set-in-add_rules.patch
ima-set-again-build_ima_appraise-variable.patch
+pci-program-mps-for-rciep-devices.patch
+e1000e-disable-tso-for-buffer-overrun-workaround.patch
+e1000e-relax-condition-to-trigger-reset-for-me-workaround.patch
+irqchip-sifive-plic-set-default-irq-affinity-in-plic_irqdomain_map.patch
+irqchip-sifive-plic-setup-cpuhp-once-after-boot-cpu-handler-is-present.patch
+carl9170-remove-p2p_go-support.patch
+clocksource-remove-obsolete-ifdef.patch
+clocksource-drivers-timer-microchip-pit64b-select-config_timer_of.patch
+media-cedrus-program-output-format-during-each-run.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
