5.10-stable patches

added patches:
	rdma-mlx5-block-fdb-rules-when-not-in-switchdev-mode.patch
	revert-kvm-x86-mmu-drop-kvm_mmu_extended_role.cr4_la57-hack.patch

diff --git a/queue-5.10/rdma-mlx5-block-fdb-rules-when-not-in-switchdev-mode.patch b/queue-5.10/rdma-mlx5-block-fdb-rules-when-not-in-switchdev-mode.patch
new file mode 100644 (file)
index 0000000..daefc35
--- /dev/null
+++ b/queue-5.10/rdma-mlx5-block-fdb-rules-when-not-in-switchdev-mode.patch
@@ -0,0 +1,45 @@
+From foo@baz Mon Jul  5 09:13:18 AM CEST 2021
+From: Mark Bloch <mbloch@nvidia.com>
+Date: Mon, 7 Jun 2021 11:03:12 +0300
+Subject: RDMA/mlx5: Block FDB rules when not in switchdev mode
+
+From: Mark Bloch <mbloch@nvidia.com>
+
+commit edc0b0bccc9c80d9a44d3002dcca94984b25e7cf upstream.
+
+Allow creating FDB steering rules only when in switchdev mode.
+
+The only software model where a userspace application can manipulate
+FDB entries is when it manages the eswitch. This is only possible in
+switchdev mode where we expose a single RDMA device with representors
+for all the vports that are connected to the eswitch.
+
+Fixes: 52438be44112 ("RDMA/mlx5: Allow inserting a steering rule to the FDB")
+Link: https://lore.kernel.org/r/e928ae7c58d07f104716a2a8d730963d1bd01204.1623052923.git.leonro@nvidia.com
+Reviewed-by: Maor Gottlieb <maorg@nvidia.com>
+Signed-off-by: Mark Bloch <mbloch@nvidia.com>
+Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
+Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
+[sudip: use old mlx5_eswitch_mode]
+Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/infiniband/hw/mlx5/fs.c |    7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/drivers/infiniband/hw/mlx5/fs.c
++++ b/drivers/infiniband/hw/mlx5/fs.c
+@@ -2136,6 +2136,13 @@ static int UVERBS_HANDLER(MLX5_IB_METHOD
+       if (err)
+               goto end;
+ 
++      if (obj->ns_type == MLX5_FLOW_NAMESPACE_FDB &&
++          mlx5_eswitch_mode(dev->mdev->priv.eswitch) !=
++                            MLX5_ESWITCH_OFFLOADS) {
++              err = -EINVAL;
++              goto end;
++      }
++
+       uobj->object = obj;
+       obj->mdev = dev->mdev;
+       atomic_set(&obj->usecnt, 0);

diff --git a/queue-5.10/revert-kvm-x86-mmu-drop-kvm_mmu_extended_role.cr4_la57-hack.patch b/queue-5.10/revert-kvm-x86-mmu-drop-kvm_mmu_extended_role.cr4_la57-hack.patch
new file mode 100644 (file)
index 0000000..40ed0a8
--- /dev/null
+++ b/queue-5.10/revert-kvm-x86-mmu-drop-kvm_mmu_extended_role.cr4_la57-hack.patch
@@ -0,0 +1,62 @@
+From f71a53d1180d5ecc346f0c6a23191d837fe2871b Mon Sep 17 00:00:00 2001
+From: Sean Christopherson <seanjc@google.com>
+Date: Tue, 22 Jun 2021 10:56:50 -0700
+Subject: Revert "KVM: x86/mmu: Drop kvm_mmu_extended_role.cr4_la57 hack"
+
+From: Sean Christopherson <seanjc@google.com>
+
+commit f71a53d1180d5ecc346f0c6a23191d837fe2871b upstream.
+
+Restore CR4.LA57 to the mmu_role to fix an amusing edge case with nested
+virtualization.  When KVM (L0) is using TDP, CR4.LA57 is not reflected in
+mmu_role.base.level because that tracks the shadow root level, i.e. TDP
+level.  Normally, this is not an issue because LA57 can't be toggled
+while long mode is active, i.e. the guest has to first disable paging,
+then toggle LA57, then re-enable paging, thus ensuring an MMU
+reinitialization.
+
+But if L1 is crafty, it can load a new CR4 on VM-Exit and toggle LA57
+without having to bounce through an unpaged section.  L1 can also load a
+new CR3 on exit, i.e. it doesn't even need to play crazy paging games, a
+single entry PML5 is sufficient.  Such shenanigans are only problematic
+if L0 and L1 use TDP, otherwise L1 and L2 share an MMU that gets
+reinitialized on nested VM-Enter/VM-Exit due to mmu_role.base.guest_mode.
+
+Note, in the L2 case with nested TDP, even though L1 can switch between
+L2s with different LA57 settings, thus bypassing the paging requirement,
+in that case KVM's nested_mmu will track LA57 in base.level.
+
+This reverts commit 8053f924cad30bf9f9a24e02b6c8ddfabf5202ea.
+
+Fixes: 8053f924cad3 ("KVM: x86/mmu: Drop kvm_mmu_extended_role.cr4_la57 hack")
+Cc: stable@vger.kernel.org
+Signed-off-by: Sean Christopherson <seanjc@google.com>
+Message-Id: <20210622175739.3610207-6-seanjc@google.com>
+Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/include/asm/kvm_host.h |    1 +
+ arch/x86/kvm/mmu/mmu.c          |    1 +
+ 2 files changed, 2 insertions(+)
+
+--- a/arch/x86/include/asm/kvm_host.h
++++ b/arch/x86/include/asm/kvm_host.h
+@@ -296,6 +296,7 @@ union kvm_mmu_extended_role {
+               unsigned int cr4_pke:1;
+               unsigned int cr4_smap:1;
+               unsigned int cr4_smep:1;
++              unsigned int cr4_la57:1;
+               unsigned int maxphyaddr:6;
+       };
+ };
+--- a/arch/x86/kvm/mmu/mmu.c
++++ b/arch/x86/kvm/mmu/mmu.c
+@@ -4442,6 +4442,7 @@ static union kvm_mmu_extended_role kvm_c
+       ext.cr4_smap = !!kvm_read_cr4_bits(vcpu, X86_CR4_SMAP);
+       ext.cr4_pse = !!is_pse(vcpu);
+       ext.cr4_pke = !!kvm_read_cr4_bits(vcpu, X86_CR4_PKE);
++      ext.cr4_la57 = !!kvm_read_cr4_bits(vcpu, X86_CR4_LA57);
+       ext.maxphyaddr = cpuid_maxphyaddr(vcpu);
+ 
+       ext.valid = 1;