arm.md (incscc,arm_incscc,decscc,arm_decscc): Delete.

2013-04-05  Greta Yorsh  <Greta.Yorsh@arm.com>

	* config/arm/arm.md (incscc,arm_incscc,decscc,arm_decscc): Delete.

From-SVN: r197519

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 31d0757b3b1594804a9c624f09f63ade293a61c7..6a591f638b83ef177a97aae3d3ed30dbb79f50e3 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2013-04-05  Greta Yorsh  <Greta.Yorsh@arm.com>
+
+       * config/arm/arm.md (incscc,arm_incscc,decscc,arm_decscc): Delete.
+
 2013-04-05  Greta Yorsh  <Greta.Yorsh@arm.com>
 
        * config/arm/arm.md (addsi3_carryin_<optab>): Set attribute predicable.

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index c712b177b126c82c458ce6be00c420bd2bd7a7fd..6dd6871b49a4ec28ffbd605e548c0d5c3817d1aa 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -1015,28 +1015,6 @@
    [(set_attr "conds" "set")]
 )
 
-(define_expand "incscc"
-  [(set (match_operand:SI 0 "s_register_operand" "=r,r")
-        (plus:SI (match_operator:SI 2 "arm_comparison_operator"
-                    [(match_operand:CC 3 "cc_register" "") (const_int 0)])
-                 (match_operand:SI 1 "s_register_operand" "0,?r")))]
-  "TARGET_32BIT"
-  ""
-)
-
-(define_insn "*arm_incscc"
-  [(set (match_operand:SI 0 "s_register_operand" "=r,r")
-        (plus:SI (match_operator:SI 2 "arm_comparison_operator"
-                    [(match_operand:CC 3 "cc_register" "") (const_int 0)])
-                 (match_operand:SI 1 "s_register_operand" "0,?r")))]
-  "TARGET_ARM"
-  "@
-  add%d2\\t%0, %1, #1
-  mov%D2\\t%0, %1\;add%d2\\t%0, %1, #1"
-  [(set_attr "conds" "use")
-   (set_attr "length" "4,8")]
-)
-
 ; transform ((x << y) - 1) to ~(~(x-1) << y)  Where X is a constant.
 (define_split
   [(set (match_operand:SI 0 "s_register_operand" "")
@@ -1267,29 +1245,6 @@
    (set_attr "type" "simple_alu_imm,*,*")]
 )
 
-(define_expand "decscc"
-  [(set (match_operand:SI            0 "s_register_operand" "=r,r")
-        (minus:SI (match_operand:SI  1 "s_register_operand" "0,?r")
-                 (match_operator:SI 2 "arm_comparison_operator"
-                   [(match_operand   3 "cc_register" "") (const_int 0)])))]
-  "TARGET_32BIT"
-  ""
-)
-
-(define_insn "*arm_decscc"
-  [(set (match_operand:SI            0 "s_register_operand" "=r,r")
-        (minus:SI (match_operand:SI  1 "s_register_operand" "0,?r")
-                 (match_operator:SI 2 "arm_comparison_operator"
-                   [(match_operand   3 "cc_register" "") (const_int 0)])))]
-  "TARGET_ARM"
-  "@
-   sub%d2\\t%0, %1, #1
-   mov%D2\\t%0, %1\;sub%d2\\t%0, %1, #1"
-  [(set_attr "conds" "use")
-   (set_attr "length" "*,8")
-   (set_attr "type" "simple_alu_imm,*")]
-)
-
 (define_expand "subsf3"
   [(set (match_operand:SF           0 "s_register_operand" "")
        (minus:SF (match_operand:SF 1 "s_register_operand" "")