riscv: hwprobe: Export Zalasr extension

Export the Zalasr extension to userspace using hwprobe.

Signed-off-by: Xu Lu <luxu.kernel@bytedance.com>
Link: https://patch.msgid.link/20251020042056.30283-4-luxu.kernel@bytedance.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>

diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst
index 2f449c9b15bdd6b9813c9a968deca1a4c4ff9b14..8b36eaa9d5d8aaae46506d38649050bbaa64e67f 100644 (file)
--- a/Documentation/arch/riscv/hwprobe.rst
+++ b/Documentation/arch/riscv/hwprobe.rst
@@ -249,6 +249,9 @@ The following keys are defined:
        defined in the in the RISC-V ISA manual starting from commit e87412e621f1
        ("integrate Zaamo and Zalrsc text (#1304)").
 
+  * :c:macro:`RISCV_HWPROBE_EXT_ZALASR`: The Zalasr extension is supported as
+       frozen at commit 194f0094 ("Version 0.9 for freeze") of riscv-zalasr.
+
   * :c:macro:`RISCV_HWPROBE_EXT_ZALRSC`: The Zalrsc extension is supported as
        defined in the in the RISC-V ISA manual starting from commit e87412e621f1
        ("integrate Zaamo and Zalrsc text (#1304)").
@@ -369,4 +372,4 @@ The following keys are defined:
 
     * :c:macro:`RISCV_HWPROBE_VENDOR_EXT_XSFVFWMACCQQQ`: The Xsfvfwmaccqqq
         vendor extension is supported in version 1.0 of Matrix Multiply Accumulate
-       Instruction Extensions Specification.
\ No newline at end of file
+       Instruction Extensions Specification.

diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h
index 5d30a4fae37a82ef4d968d20b187420772ad8946..906896780999e6ac3a02883d55dca56c03686427 100644 (file)
--- a/arch/riscv/include/uapi/asm/hwprobe.h
+++ b/arch/riscv/include/uapi/asm/hwprobe.h
@@ -82,6 +82,7 @@ struct riscv_hwprobe {
 #define                RISCV_HWPROBE_EXT_ZAAMO         (1ULL << 56)
 #define                RISCV_HWPROBE_EXT_ZALRSC        (1ULL << 57)
 #define                RISCV_HWPROBE_EXT_ZABHA         (1ULL << 58)
+#define                RISCV_HWPROBE_EXT_ZALASR        (1ULL << 59)
 #define RISCV_HWPROBE_KEY_CPUPERF_0    5
 #define                RISCV_HWPROBE_MISALIGNED_UNKNOWN        (0 << 0)
 #define                RISCV_HWPROBE_MISALIGNED_EMULATED       (1 << 0)

diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c
index 199d13f86f3135ff9e8a2672c3a203a70b845530..55004d81631a19da2bf81eeef111f6f54ed91cbb 100644 (file)
--- a/arch/riscv/kernel/sys_hwprobe.c
+++ b/arch/riscv/kernel/sys_hwprobe.c
@@ -109,6 +109,7 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair,
                EXT_KEY(ZAAMO);
                EXT_KEY(ZABHA);
                EXT_KEY(ZACAS);
+               EXT_KEY(ZALASR);
                EXT_KEY(ZALRSC);
                EXT_KEY(ZAWRS);
                EXT_KEY(ZBA);