arm64: dts: imx8qxp-mek: enable 8qxp lpuart2 and lpuart3

Enable uart2 and uart3 for imx8qxp-mek board.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index 7924b0969ad8ff91200919eb862c17308d51ad74..99611729943cee89cef4162507c569a8fb54c65a 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -187,6 +187,18 @@
        status = "okay";
 };
 
+&lpuart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lpuart2>;
+       status = "okay";
+};
+
+&lpuart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lpuart3>;
+       status = "okay";
+};
+
 &mu_m0 {
        status = "okay";
 };
@@ -340,6 +352,20 @@
                >;
        };
 
+       pinctrl_lpuart2: lpuart2grp {
+               fsl,pins = <
+                       IMX8QXP_UART2_TX_ADMA_UART2_TX          0x06000020
+                       IMX8QXP_UART2_RX_ADMA_UART2_RX          0x06000020
+               >;
+       };
+
+       pinctrl_lpuart3: lpuart3grp {
+               fsl,pins = <
+                       IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX       0x06000020
+                       IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX       0x06000020
+               >;
+       };
+
        pinctrl_typec: typecgrp {
                fsl,pins = <
                        IMX8QXP_SPI2_SCK_LSIO_GPIO1_IO03                        0x06000021