]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: ti: k3-j784s4-main: Add node for EHRPWMs
authorDasnavis Sabiya <sabiya.d@ti.com>
Mon, 3 Jun 2024 11:29:38 +0000 (16:59 +0530)
committerVignesh Raghavendra <vigneshr@ti.com>
Wed, 19 Jun 2024 17:10:54 +0000 (22:40 +0530)
Add dts nodes for 6 EHRPWM instances on SoC.

Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20240603112938.2188510-1-u-kumar1@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi

index fd3d3344efbea0cb8f69af5d10a4a7b2af6a916f..a3e91ff87b4ae5e08b10917a663ae26494c88d85 100644 (file)
                        #mux-control-cells = <1>;
                        mux-reg-masks = <0x0 0x8000000>; /* USB0 to SERDES0 lane 3 mux */
                };
+
+               ehrpwm_tbclk: clock-controller@4140 {
+                       compatible = "ti,am654-ehrpwm-tbclk";
+                       reg = <0x4140 0x18>;
+                       #clock-cells = <1>;
+               };
+       };
+
+       main_ehrpwm0: pwm@3000000 {
+               compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+               reg = <0x00 0x3000000 0x00 0x100>;
+               clocks = <&ehrpwm_tbclk 0>, <&k3_clks 219 0>;
+               clock-names = "tbclk", "fck";
+               power-domains = <&k3_pds 219 TI_SCI_PD_EXCLUSIVE>;
+               #pwm-cells = <3>;
+               status = "disabled";
+       };
+
+       main_ehrpwm1: pwm@3010000 {
+               compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+               reg = <0x00 0x3010000 0x00 0x100>;
+               clocks = <&ehrpwm_tbclk 1>, <&k3_clks 220 0>;
+               clock-names = "tbclk", "fck";
+               power-domains = <&k3_pds 220 TI_SCI_PD_EXCLUSIVE>;
+               #pwm-cells = <3>;
+               status = "disabled";
+       };
+
+       main_ehrpwm2: pwm@3020000 {
+               compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+               reg = <0x00 0x3020000 0x00 0x100>;
+               clocks = <&ehrpwm_tbclk 2>, <&k3_clks 221 0>;
+               clock-names = "tbclk", "fck";
+               power-domains = <&k3_pds 221 TI_SCI_PD_EXCLUSIVE>;
+               #pwm-cells = <3>;
+               status = "disabled";
+       };
+
+       main_ehrpwm3: pwm@3030000 {
+               compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+               reg = <0x00 0x3030000 0x00 0x100>;
+               clocks = <&ehrpwm_tbclk 3>, <&k3_clks 222 0>;
+               clock-names = "tbclk", "fck";
+               power-domains = <&k3_pds 222 TI_SCI_PD_EXCLUSIVE>;
+               #pwm-cells = <3>;
+               status = "disabled";
+       };
+
+       main_ehrpwm4: pwm@3040000 {
+               compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+               reg = <0x00 0x3040000 0x00 0x100>;
+               clocks = <&ehrpwm_tbclk 4>, <&k3_clks 223 0>;
+               clock-names = "tbclk", "fck";
+               power-domains = <&k3_pds 223 TI_SCI_PD_EXCLUSIVE>;
+               #pwm-cells = <3>;
+               status = "disabled";
+       };
+
+       main_ehrpwm5: pwm@3050000 {
+               compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
+               reg = <0x00 0x3050000 0x00 0x100>;
+               clocks = <&ehrpwm_tbclk 5>, <&k3_clks 224 0>;
+               clock-names = "tbclk", "fck";
+               power-domains = <&k3_pds 224 TI_SCI_PD_EXCLUSIVE>;
+               #pwm-cells = <3>;
+               status = "disabled";
        };
 
        gic500: interrupt-controller@1800000 {