5.15-stable patches

added patches:
	soc-sifive-l2_cache-fix-missing-free_irq-in-error-path-in-sifive_l2_init.patch
	soc-sifive-l2_cache-fix-missing-iounmap-in-error-path-in-sifive_l2_init.patch
	soc-sifive-l2_cache-fix-missing-of_node_put-in-sifive_l2_init.patch

diff --git a/queue-5.15/series b/queue-5.15/series
index 11bda91f7187e79037b1b603261b273da20e4d56..13657249c85e3b61387a266de04da3d08a436356 100644 (file)
--- a/queue-5.15/series
+++ b/queue-5.15/series
@@ -68,3 +68,6 @@ iio-adc-at91-sama5d2_adc-fix-an-error-code-in-at91_adc_allocate_trigger.patch
 mm-page_alloc-fix-potential-deadlock-on-zonelist_update_seq-seqlock.patch
 asoc-fsl_asrc_dma-fix-potential-null-ptr-deref.patch
 asn.1-fix-check-for-strdup-success.patch
+soc-sifive-l2_cache-fix-missing-iounmap-in-error-path-in-sifive_l2_init.patch
+soc-sifive-l2_cache-fix-missing-free_irq-in-error-path-in-sifive_l2_init.patch
+soc-sifive-l2_cache-fix-missing-of_node_put-in-sifive_l2_init.patch

diff --git a/queue-5.15/soc-sifive-l2_cache-fix-missing-free_irq-in-error-path-in-sifive_l2_init.patch b/queue-5.15/soc-sifive-l2_cache-fix-missing-free_irq-in-error-path-in-sifive_l2_init.patch
new file mode 100644 (file)
index 0000000..06200b8
--- /dev/null
+++ b/queue-5.15/soc-sifive-l2_cache-fix-missing-free_irq-in-error-path-in-sifive_l2_init.patch
@@ -0,0 +1,46 @@
+From stable-owner@vger.kernel.org Mon Apr 24 11:19:52 2023
+From: Conor Dooley <conor.dooley@microchip.com>
+Date: Mon, 24 Apr 2023 10:19:03 +0100
+Subject: soc: sifive: l2_cache: fix missing free_irq() in error path in sifive_l2_init()
+To: <stable@vger.kernel.org>
+Cc: <conor@kernel.org>, <conor.dooley@microchip.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Greentime Hu <greentime.hu@sifive.com>, Zong Li <zong.li@sifive.com>, Palmer Dabbelt <palmer@rivosinc.com>, Sasha Levin <sashal@kernel.org>, Yang Yingliang <yangyingliang@huawei.com>
+Message-ID: <20230424-citizen-emphasis-df520424513a@wendy>
+
+From: Yang Yingliang <yangyingliang@huawei.com>
+
+commit 756344e7cb1afbb87da8705c20384dddd0dea233 upstream.
+
+Add missing free_irq() before return error from sifive_l2_init().
+
+Fixes: a967a289f169 ("RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs")
+Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
+Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
+Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
+[conor: ccache -> l2_cache]
+Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/soc/sifive/sifive_l2_cache.c |    5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- a/drivers/soc/sifive/sifive_l2_cache.c
++++ b/drivers/soc/sifive/sifive_l2_cache.c
+@@ -221,7 +221,7 @@ static int __init sifive_l2_init(void)
+               rc = request_irq(g_irq[i], l2_int_handler, 0, "l2_ecc", NULL);
+               if (rc) {
+                       pr_err("L2CACHE: Could not request IRQ %d\n", g_irq[i]);
+-                      goto err_unmap;
++                      goto err_free_irq;
+               }
+       }
+ 
+@@ -235,6 +235,9 @@ static int __init sifive_l2_init(void)
+ #endif
+       return 0;
+ 
++err_free_irq:
++      while (--i >= 0)
++              free_irq(g_irq[i], NULL);
+ err_unmap:
+       iounmap(l2_base);
+       return rc;

diff --git a/queue-5.15/soc-sifive-l2_cache-fix-missing-iounmap-in-error-path-in-sifive_l2_init.patch b/queue-5.15/soc-sifive-l2_cache-fix-missing-iounmap-in-error-path-in-sifive_l2_init.patch
new file mode 100644 (file)
index 0000000..daba544
--- /dev/null
+++ b/queue-5.15/soc-sifive-l2_cache-fix-missing-iounmap-in-error-path-in-sifive_l2_init.patch
@@ -0,0 +1,56 @@
+From stable-owner@vger.kernel.org Mon Apr 24 11:19:51 2023
+From: Conor Dooley <conor.dooley@microchip.com>
+Date: Mon, 24 Apr 2023 10:19:02 +0100
+Subject: soc: sifive: l2_cache: fix missing iounmap() in error path in sifive_l2_init()
+To: <stable@vger.kernel.org>
+Cc: <conor@kernel.org>, <conor.dooley@microchip.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Greentime Hu <greentime.hu@sifive.com>, Zong Li <zong.li@sifive.com>, Palmer Dabbelt <palmer@rivosinc.com>, Sasha Levin <sashal@kernel.org>, Yang Yingliang <yangyingliang@huawei.com>
+Message-ID: <20230424-antonym-petroleum-d9930af1e6c6@wendy>
+
+From: Yang Yingliang <yangyingliang@huawei.com>
+
+commit 73e770f085023da327dc9ffeb6cd96b0bb22d97e upstream.
+
+Add missing iounmap() before return error from sifive_l2_init().
+
+Fixes: a967a289f169 ("RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs")
+Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
+Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
+Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
+[conor: ccache -> l2_cache]
+Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/soc/sifive/sifive_l2_cache.c |    9 +++++++--
+ 1 file changed, 7 insertions(+), 2 deletions(-)
+
+--- a/drivers/soc/sifive/sifive_l2_cache.c
++++ b/drivers/soc/sifive/sifive_l2_cache.c
+@@ -212,7 +212,8 @@ static int __init sifive_l2_init(void)
+       intr_num = of_property_count_u32_elems(np, "interrupts");
+       if (!intr_num) {
+               pr_err("L2CACHE: no interrupts property\n");
+-              return -ENODEV;
++              rc = -ENODEV;
++              goto err_unmap;
+       }
+ 
+       for (i = 0; i < intr_num; i++) {
+@@ -220,7 +221,7 @@ static int __init sifive_l2_init(void)
+               rc = request_irq(g_irq[i], l2_int_handler, 0, "l2_ecc", NULL);
+               if (rc) {
+                       pr_err("L2CACHE: Could not request IRQ %d\n", g_irq[i]);
+-                      return rc;
++                      goto err_unmap;
+               }
+       }
+ 
+@@ -233,5 +234,9 @@ static int __init sifive_l2_init(void)
+       setup_sifive_debug();
+ #endif
+       return 0;
++
++err_unmap:
++      iounmap(l2_base);
++      return rc;
+ }
+ device_initcall(sifive_l2_init);

diff --git a/queue-5.15/soc-sifive-l2_cache-fix-missing-of_node_put-in-sifive_l2_init.patch b/queue-5.15/soc-sifive-l2_cache-fix-missing-of_node_put-in-sifive_l2_init.patch
new file mode 100644 (file)
index 0000000..197fb5c
--- /dev/null
+++ b/queue-5.15/soc-sifive-l2_cache-fix-missing-of_node_put-in-sifive_l2_init.patch
@@ -0,0 +1,67 @@
+From stable-owner@vger.kernel.org Mon Apr 24 11:19:51 2023
+From: Conor Dooley <conor.dooley@microchip.com>
+Date: Mon, 24 Apr 2023 10:19:04 +0100
+Subject: soc: sifive: l2_cache: fix missing of_node_put() in sifive_l2_init()
+To: <stable@vger.kernel.org>
+Cc: <conor@kernel.org>, <conor.dooley@microchip.com>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Greentime Hu <greentime.hu@sifive.com>, Zong Li <zong.li@sifive.com>, Palmer Dabbelt <palmer@rivosinc.com>, Sasha Levin <sashal@kernel.org>, Yang Yingliang <yangyingliang@huawei.com>
+Message-ID: <20230424-shading-breeze-0d4b62b0dc55@wendy>
+
+From: Yang Yingliang <yangyingliang@huawei.com>
+
+commit 8fbf94fea0b4e187ca9100936c5429f96b8a4e44 upstream.
+
+The device_node pointer returned by of_find_matching_node() with
+refcount incremented, when finish using it, the refcount need be
+decreased.
+
+Fixes: a967a289f169 ("RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs")
+Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
+Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
+Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
+[conor: cache -> l2_cache]
+Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/soc/sifive/sifive_l2_cache.c |   15 +++++++++++----
+ 1 file changed, 11 insertions(+), 4 deletions(-)
+
+--- a/drivers/soc/sifive/sifive_l2_cache.c
++++ b/drivers/soc/sifive/sifive_l2_cache.c
+@@ -202,12 +202,16 @@ static int __init sifive_l2_init(void)
+       if (!np)
+               return -ENODEV;
+ 
+-      if (of_address_to_resource(np, 0, &res))
+-              return -ENODEV;
++      if (of_address_to_resource(np, 0, &res)) {
++              rc = -ENODEV;
++              goto err_node_put;
++      }
+ 
+       l2_base = ioremap(res.start, resource_size(&res));
+-      if (!l2_base)
+-              return -ENOMEM;
++      if (!l2_base) {
++              rc = -ENOMEM;
++              goto err_node_put;
++      }
+ 
+       intr_num = of_property_count_u32_elems(np, "interrupts");
+       if (!intr_num) {
+@@ -224,6 +228,7 @@ static int __init sifive_l2_init(void)
+                       goto err_free_irq;
+               }
+       }
++      of_node_put(np);
+ 
+       l2_config_read();
+ 
+@@ -240,6 +245,8 @@ err_free_irq:
+               free_irq(g_irq[i], NULL);
+ err_unmap:
+       iounmap(l2_base);
++err_node_put:
++      of_node_put(np);
+       return rc;
+ }
+ device_initcall(sifive_l2_init);