]> git.ipfire.org Git - thirdparty/kernel/stable-queue.git/commitdiff
4.9-stable patches
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 11 Apr 2022 08:20:28 +0000 (10:20 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 11 Apr 2022 08:20:28 +0000 (10:20 +0200)
added patches:
arm64-patch_text-fixup-last-cpu-should-be-master.patch

queue-4.9/arm64-patch_text-fixup-last-cpu-should-be-master.patch [new file with mode: 0644]
queue-4.9/series

diff --git a/queue-4.9/arm64-patch_text-fixup-last-cpu-should-be-master.patch b/queue-4.9/arm64-patch_text-fixup-last-cpu-should-be-master.patch
new file mode 100644 (file)
index 0000000..48803eb
--- /dev/null
@@ -0,0 +1,42 @@
+From 31a099dbd91e69fcab55eef4be15ed7a8c984918 Mon Sep 17 00:00:00 2001
+From: Guo Ren <guoren@linux.alibaba.com>
+Date: Thu, 7 Apr 2022 15:33:20 +0800
+Subject: arm64: patch_text: Fixup last cpu should be master
+
+From: Guo Ren <guoren@linux.alibaba.com>
+
+commit 31a099dbd91e69fcab55eef4be15ed7a8c984918 upstream.
+
+These patch_text implementations are using stop_machine_cpuslocked
+infrastructure with atomic cpu_count. The original idea: When the
+master CPU patch_text, the others should wait for it. But current
+implementation is using the first CPU as master, which couldn't
+guarantee the remaining CPUs are waiting. This patch changes the
+last CPU as the master to solve the potential risk.
+
+Fixes: ae16480785de ("arm64: introduce interfaces to hotpatch kernel and module code")
+Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
+Signed-off-by: Guo Ren <guoren@kernel.org>
+Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
+Reviewed-by: Masami Hiramatsu <mhiramat@kernel.org>
+Cc: <stable@vger.kernel.org>
+Link: https://lore.kernel.org/r/20220407073323.743224-2-guoren@kernel.org
+Signed-off-by: Will Deacon <will@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/kernel/insn.c |    4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/kernel/insn.c
++++ b/arch/arm64/kernel/insn.c
+@@ -234,8 +234,8 @@ static int __kprobes aarch64_insn_patch_
+       int i, ret = 0;
+       struct aarch64_insn_patch *pp = arg;
+-      /* The first CPU becomes master */
+-      if (atomic_inc_return(&pp->cpu_count) == 1) {
++      /* The last CPU becomes master */
++      if (atomic_inc_return(&pp->cpu_count) == num_online_cpus()) {
+               for (i = 0; ret == 0 && i < pp->insn_cnt; i++)
+                       ret = aarch64_insn_patch_text_nosync(pp->text_addrs[i],
+                                                            pp->new_insns[i]);
index 21d3ed21ab2288987197b5d55950171d858d396d..6be43e0efed0d76c72be90f384bb309e3a5e2ab6 100644 (file)
@@ -193,3 +193,4 @@ mmmremap.c-avoid-pointless-invalidate_range_start-end-on-mremap-old_size-0.patch
 mm-mempolicy-fix-mpol_new-leak-in-shared_policy_replace.patch
 x86-pm-save-the-msr-validity-status-at-context-setup.patch
 x86-speculation-restore-speculation-related-msrs-during-s3-resume.patch
+arm64-patch_text-fixup-last-cpu-should-be-master.patch