RISC-V: testsuite: Fix reduc-8.c and reduc-9.c

In both tests we expect a VEC_SHL_INSERT expression but we now add the
initial value at the end.  Just remove that scan check.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/reduc/reduc-8.c: Remove
	VEC_SHL_INSERT check.
	* gcc.target/riscv/rvv/autovec/reduc/reduc-9.c: Ditto.

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc-8.c
index fe47aa3648ddf3bc71c1cee6301c66b8ba03d44b..518f0c33cc4e4dfbd0f5a9355236e480a8921f86 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc-8.c
@@ -12,5 +12,4 @@ add_loop (int *x, int n, int res)
   return res;
 }
 
-/* { dg-final { scan-tree-dump-times "VEC_SHL_INSERT" 1 "optimized" } } */
 /* { dg-final { scan-assembler-times {vslide1up\.vx\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc-9.c
index 6630d3027210b079fba3e9b9a4a2a80a8c1fbbf4..a5bb8dcccb81b3a010896e543db4f1baa2cb9e83 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc-9.c
@@ -12,5 +12,4 @@ add_loop (float *x, int n, float res)
   return res;
 }
 
-/* { dg-final { scan-tree-dump-times "VEC_SHL_INSERT" 1 "optimized" } } */
 /* { dg-final { scan-assembler-times {vfslide1up\.vf\s+v[0-9]+,\s*v[0-9]+,\s*[a-x0-9]+} 1 } } */