aarch64: add STEP2 feature and its associated registers

AArch64 defines new registers for the feature step2 (Enhanced Software Step
Extension). step2 is an Armv9.5-A feature.

This patch also adds relevant tests. Regression tested on aarch64-none-elf,
and no regression found.

diff --git a/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs-archv9_4-unsupported.l b/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs-archv9_4-unsupported.l
index 66dd5e8558e709bd08b63a0e412294dc742e81f7..58e7f9b9c26065d6eecad61a3cda7951cca8e73a 100644 (file)
--- a/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs-archv9_4-unsupported.l
+++ b/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs-archv9_4-unsupported.l
@@ -10,4 +10,8 @@
 [^ :]+:[0-9]+: Error: selected processor does not support system register name 'spmzr_el0'
 [^ :]+:[0-9]+:  Info: macro invoked from here
 [^ :]+:[0-9]+: Error: selected processor does not support system register name 'spmzr_el0'
+[^ :]+:[0-9]+:  Info: macro invoked from here
+[^ :]+:[0-9]+: Error: selected processor does not support system register name 'mdstepop_el1'
+[^ :]+:[0-9]+:  Info: macro invoked from here
+[^ :]+:[0-9]+: Error: selected processor does not support system register name 'mdstepop_el1'
 [^ :]+:[0-9]+:  Info: macro invoked from here
\ No newline at end of file

diff --git a/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs.d b/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs.d
index 1a6c3be8abbaa08177dbf9556ce9a61878acd78d..c52142d39980fb41fb6cc61e846b606cf34d4148 100644 (file)
--- a/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs.d
+++ b/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs.d
@@ -13,3 +13,5 @@ Disassembly of section \.text:
 .*:    d53e5260        mrs     x0, vsesr_el3
 .*:    d5139c80        msr     spmzr_el0, x0
 .*:    d5339c80        mrs     x0, spmzr_el0
+.*:    d5100540        msr     mdstepop_el1, x0
+.*:    d5300540        mrs     x0, mdstepop_el1

diff --git a/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs.s b/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs.s
index 701a80ce90338b61aa602b19aedbbbbee9e08617..e3ba989c88e6b45672818887c2aa9381206a9413 100644 (file)
--- a/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs.s
+++ b/gas/testsuite/gas/aarch64/sysreg/armv9_5-a-sysregs.s
@@ -8,3 +8,6 @@ rw_sys_reg sys_reg=vsesr_el3 xreg=x0 r=1 w=1
 
 /* System Performance Monitors Extension version 2. */
 rw_sys_reg sys_reg=spmzr_el0 xreg=x0 r=1 w=1
+
+/* Enhanced Software Step Extension. */
+rw_sys_reg sys_reg=mdstepop_el1 xreg=x0 r=1 w=1

diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 4dc30193d4042718e08104d54c45efbaaf907b6b..dfed0a509b2d6f3f20a1a8cd8b7ed836e81e3258 100644 (file)
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -234,6 +234,8 @@ enum aarch64_feature_bit {
   AARCH64_FEATURE_SVE2p1,
   /* RCPC3 instructions.  */
   AARCH64_FEATURE_RCPC3,
+  /* Enhanced Software Step Extension. */
+  AARCH64_FEATURE_STEP2,
   /* Checked Pointer Arithmetic instructions. */
   AARCH64_FEATURE_CPA,
   /* FAMINMAX instructions.  */
@@ -373,6 +375,7 @@ enum aarch64_feature_bit {
                                         | AARCH64_FEATBIT (X, FAMINMAX)\
                                         | AARCH64_FEATBIT (X, E3DSE)   \
                                         | AARCH64_FEATBIT (X, SPMU2)   \
+                                        | AARCH64_FEATBIT (X, STEP2)   \
                                        )
 
 /* Architectures are the sum of the base and extensions.  */

diff --git a/opcodes/aarch64-sys-regs.def b/opcodes/aarch64-sys-regs.def
index 4fbc65e32fd8ab77408006a6045b32c95c141278..cd2f1ac8516ff1ef78b914fd4aec13a8e80aed96 100644 (file)
--- a/opcodes/aarch64-sys-regs.def
+++ b/opcodes/aarch64-sys-regs.def
@@ -573,6 +573,7 @@
   SYSREG ("mdrar_el1",         CPENC (2,0,1,0,0),      F_REG_READ,             AARCH64_NO_FEATURES)
   SYSREG ("mdscr_el1",         CPENC (2,0,0,2,2),      0,                      AARCH64_NO_FEATURES)
   SYSREG ("mdselr_el1",                CPENC (2,0,0,4,2),      F_ARCHEXT,              AARCH64_FEATURE (DEBUGv8p9))
+  SYSREG ("mdstepop_el1",      CPENC (2,0,0,5,2),      F_ARCHEXT,              AARCH64_FEATURE (STEP2))
   SYSREG ("mecid_a0_el2",      CPENC (3,4,10,8,1),     0,                      AARCH64_NO_FEATURES)
   SYSREG ("mecid_a1_el2",      CPENC (3,4,10,8,3),     0,                      AARCH64_NO_FEATURES)
   SYSREG ("mecid_p0_el2",      CPENC (3,4,10,8,0),     0,                      AARCH64_NO_FEATURES)