--- /dev/null
+From 53c3685f5307967a62517ace10e69d66520d0fc5 Mon Sep 17 00:00:00 2001
+From: Leo Li <sunpeng.li@amd.com>
+Date: Tue, 20 Aug 2024 14:34:15 -0400
+Subject: drm/amd/display: Lock DC and exit IPS when changing backlight
+
+From: Leo Li <sunpeng.li@amd.com>
+
+commit 53c3685f5307967a62517ace10e69d66520d0fc5 upstream.
+
+Backlight updates require aux and/or register access. Therefore, driver
+needs to disallow IPS beforehand.
+
+So, acquire the dc lock before calling into dc to update backlight - we
+should be doing this regardless of IPS. Then, while the lock is held,
+disallow IPS before calling into dc, then allow IPS afterwards (if it
+was previously allowed).
+
+Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
+Reviewed-by: Roman Li <roman.li@amd.com>
+Signed-off-by: Leo Li <sunpeng.li@amd.com>
+Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+(cherry picked from commit 988fe2862635c1b1b40e41c85c24db44ab337c13)
+Cc: stable@vger.kernel.org # 6.10+
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 13 ++++++++++++-
+ 1 file changed, 12 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+@@ -4237,7 +4237,7 @@ static void amdgpu_dm_backlight_set_leve
+ struct amdgpu_dm_backlight_caps caps;
+ struct dc_link *link;
+ u32 brightness;
+- bool rc;
++ bool rc, reallow_idle = false;
+
+ amdgpu_dm_update_backlight_caps(dm, bl_idx);
+ caps = dm->backlight_caps[bl_idx];
+@@ -4250,6 +4250,12 @@ static void amdgpu_dm_backlight_set_leve
+ link = (struct dc_link *)dm->backlight_link[bl_idx];
+
+ /* Change brightness based on AUX property */
++ mutex_lock(&dm->dc_lock);
++ if (dm->dc->caps.ips_support && dm->dc->ctx->dmub_srv->idle_allowed) {
++ dc_allow_idle_optimizations(dm->dc, false);
++ reallow_idle = true;
++ }
++
+ if (caps.aux_support) {
+ rc = dc_link_set_backlight_level_nits(link, true, brightness,
+ AUX_BL_DEFAULT_TRANSITION_TIME_MS);
+@@ -4261,6 +4267,11 @@ static void amdgpu_dm_backlight_set_leve
+ DRM_DEBUG("DM: Failed to update backlight on eDP[%d]\n", bl_idx);
+ }
+
++ if (dm->dc->caps.ips_support && reallow_idle)
++ dc_allow_idle_optimizations(dm->dc, true);
++
++ mutex_unlock(&dm->dc_lock);
++
+ if (rc)
+ dm->actual_brightness[bl_idx] = user_brightness;
+ }
--- /dev/null
+From 4de34b04783628f14614badb0a1aa67ce3fcef5d Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Tue, 26 Mar 2024 11:28:29 -0400
+Subject: drm/amdgpu: always allocate cleared VRAM for GEM allocations
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 4de34b04783628f14614badb0a1aa67ce3fcef5d upstream.
+
+This adds allocation latency, but aligns better with user
+expectations. The latency should improve with the drm buddy
+clearing patches that Arun has been working on.
+
+In addition this fixes the high CPU spikes seen when doing
+wipe on release.
+
+v2: always set AMDGPU_GEM_CREATE_VRAM_CLEARED (Christian)
+
+Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3528
+Fixes: a68c7eaa7a8f ("drm/amdgpu: Enable clear page functionality")
+Acked-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
+Reviewed-by: Michel Dänzer <mdaenzer@redhat.com> (v1)
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
+Cc: Christian König <christian.koenig@amd.com>
+(cherry picked from commit 6c0a7c3c693ac84f8b50269a9088af8f37446863)
+Cc: stable@vger.kernel.org # 6.10.x
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+@@ -347,6 +347,9 @@ int amdgpu_gem_create_ioctl(struct drm_d
+ return -EINVAL;
+ }
+
++ /* always clear VRAM */
++ flags |= AMDGPU_GEM_CREATE_VRAM_CLEARED;
++
+ /* create a gem object to contain this object in */
+ if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS |
+ AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
--- /dev/null
+From 59d3cfdd7f9655a0400ac453bf92199204f8b2a1 Mon Sep 17 00:00:00 2001
+From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
+Date: Tue, 20 Aug 2024 14:59:52 -0700
+Subject: drm/i915: Do not attempt to load the GSC multiple times
+
+From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
+
+commit 59d3cfdd7f9655a0400ac453bf92199204f8b2a1 upstream.
+
+If the GSC FW fails to load the GSC HW hangs permanently; the only ways
+to recover it are FLR or D3cold entry, with the former only being
+supported on driver unload and the latter only on DGFX, for which we
+don't need to load the GSC. Therefore, if GSC fails to load there is no
+need to try again because the HW is stuck in the error state and the
+submission to load the FW would just hang the GSCCS.
+
+Note that, due to wa_14015076503, on MTL the GuC escalates all GSCCS
+hangs to full GT resets, which would trigger a new attempt to load the
+GSC FW in the post-reset HW re-init; this issue is also fixed by not
+attempting to load the GSC FW after an error.
+
+Fixes: 15bd4a67e914 ("drm/i915/gsc: GSC firmware loading")
+Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
+Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
+Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
+Cc: John Harrison <John.C.Harrison@Intel.com>
+Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
+Cc: <stable@vger.kernel.org> # v6.3+
+Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20240820215952.2290807-1-daniele.ceraolospurio@intel.com
+(cherry picked from commit 03ded4d432a1fb7bb6c44c5856d14115f6f6c3b9)
+Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.c | 2 +-
+ drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 5 +++++
+ 2 files changed, 6 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.c
++++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.c
+@@ -302,7 +302,7 @@ void intel_gsc_uc_load_start(struct inte
+ {
+ struct intel_gt *gt = gsc_uc_to_gt(gsc);
+
+- if (!intel_uc_fw_is_loadable(&gsc->fw))
++ if (!intel_uc_fw_is_loadable(&gsc->fw) || intel_uc_fw_is_in_error(&gsc->fw))
+ return;
+
+ if (intel_gsc_uc_fw_init_done(gsc))
+--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
++++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
+@@ -258,6 +258,11 @@ static inline bool intel_uc_fw_is_runnin
+ return __intel_uc_fw_status(uc_fw) == INTEL_UC_FIRMWARE_RUNNING;
+ }
+
++static inline bool intel_uc_fw_is_in_error(struct intel_uc_fw *uc_fw)
++{
++ return intel_uc_fw_status_to_error(__intel_uc_fw_status(uc_fw)) != 0;
++}
++
+ static inline bool intel_uc_fw_is_overridden(const struct intel_uc_fw *uc_fw)
+ {
+ return uc_fw->user_overridden;
--- /dev/null
+From 3f6b2f60b4631cd0c368da6a1587ab55a696164d Mon Sep 17 00:00:00 2001
+From: Matt Coster <matt.coster@imgtec.com>
+Date: Mon, 2 Sep 2024 09:48:48 +0100
+Subject: drm/imagination: Free pvr_vm_gpuva after unlink
+
+From: Matt Coster <matt.coster@imgtec.com>
+
+commit 3f6b2f60b4631cd0c368da6a1587ab55a696164d upstream.
+
+This caused a measurable memory leak. Although the individual
+allocations are small, the leaks occurs in a high-usage codepath
+(remapping or unmapping device memory) so they add up quickly.
+
+Fixes: ff5f643de0bf ("drm/imagination: Add GEM and VM related code")
+Cc: stable@vger.kernel.org
+Reviewed-by: Frank Binns <frank.binns@imgtec.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/35867394-d8ce-4698-a8fd-919a018f1583@imgtec.com
+Signed-off-by: Matt Coster <matt.coster@imgtec.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/imagination/pvr_vm.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/drivers/gpu/drm/imagination/pvr_vm.c b/drivers/gpu/drm/imagination/pvr_vm.c
+index e59517ba039e..97c0f772ed65 100644
+--- a/drivers/gpu/drm/imagination/pvr_vm.c
++++ b/drivers/gpu/drm/imagination/pvr_vm.c
+@@ -114,6 +114,8 @@ struct pvr_vm_gpuva {
+ struct drm_gpuva base;
+ };
+
++#define to_pvr_vm_gpuva(va) container_of_const(va, struct pvr_vm_gpuva, base)
++
+ enum pvr_vm_bind_type {
+ PVR_VM_BIND_TYPE_MAP,
+ PVR_VM_BIND_TYPE_UNMAP,
+@@ -386,6 +388,7 @@ pvr_vm_gpuva_unmap(struct drm_gpuva_op *op, void *op_ctx)
+
+ drm_gpuva_unmap(&op->unmap);
+ drm_gpuva_unlink(op->unmap.va);
++ kfree(to_pvr_vm_gpuva(op->unmap.va));
+
+ return 0;
+ }
+@@ -433,6 +436,7 @@ pvr_vm_gpuva_remap(struct drm_gpuva_op *op, void *op_ctx)
+ }
+
+ drm_gpuva_unlink(op->remap.unmap->va);
++ kfree(to_pvr_vm_gpuva(op->remap.unmap->va));
+
+ return 0;
+ }
+--
+2.46.0
+
--- /dev/null
+From 7de295d1a1a1b84e57b348e8bfd0fab5aab3ce69 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Adri=C3=A1n=20Larumbe?= <adrian.larumbe@collabora.com>
+Date: Mon, 2 Sep 2024 14:02:35 +0100
+Subject: drm/panthor: flush FW AS caches in slow reset path
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Adrián Larumbe <adrian.larumbe@collabora.com>
+
+commit 7de295d1a1a1b84e57b348e8bfd0fab5aab3ce69 upstream.
+
+In the off-chance that waiting for the firmware to signal its booted status
+timed out in the fast reset path, one must flush the cache lines for the
+entire FW VM address space before reloading the regions, otherwise stale
+values eventually lead to a scheduler job timeout.
+
+Fixes: 647810ec2476 ("drm/panthor: Add the MMU/VM logical block")
+Cc: stable@vger.kernel.org
+Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
+Acked-by: Liviu Dudau <liviu.dudau@arm.com>
+Reviewed-by: Steven Price <steven.price@arm.com>
+Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
+Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20240902130237.3440720-1-adrian.larumbe@collabora.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/panthor/panthor_fw.c | 8 +++++++-
+ drivers/gpu/drm/panthor/panthor_mmu.c | 21 ++++++++++++++++++---
+ drivers/gpu/drm/panthor/panthor_mmu.h | 1 +
+ 3 files changed, 26 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/gpu/drm/panthor/panthor_fw.c b/drivers/gpu/drm/panthor/panthor_fw.c
+index 857f3f11258a..ef232c0c2049 100644
+--- a/drivers/gpu/drm/panthor/panthor_fw.c
++++ b/drivers/gpu/drm/panthor/panthor_fw.c
+@@ -1089,6 +1089,12 @@ int panthor_fw_post_reset(struct panthor_device *ptdev)
+ panthor_fw_stop(ptdev);
+ ptdev->fw->fast_reset = false;
+ drm_err(&ptdev->base, "FW fast reset failed, trying a slow reset");
++
++ ret = panthor_vm_flush_all(ptdev->fw->vm);
++ if (ret) {
++ drm_err(&ptdev->base, "FW slow reset failed (couldn't flush FW's AS l2cache)");
++ return ret;
++ }
+ }
+
+ /* Reload all sections, including RO ones. We're not supposed
+@@ -1099,7 +1105,7 @@ int panthor_fw_post_reset(struct panthor_device *ptdev)
+
+ ret = panthor_fw_start(ptdev);
+ if (ret) {
+- drm_err(&ptdev->base, "FW slow reset failed");
++ drm_err(&ptdev->base, "FW slow reset failed (couldn't start the FW )");
+ return ret;
+ }
+
+diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c b/drivers/gpu/drm/panthor/panthor_mmu.c
+index fa0a002b1016..cc6e13a97783 100644
+--- a/drivers/gpu/drm/panthor/panthor_mmu.c
++++ b/drivers/gpu/drm/panthor/panthor_mmu.c
+@@ -576,6 +576,12 @@ static int mmu_hw_do_operation_locked(struct panthor_device *ptdev, int as_nr,
+ if (as_nr < 0)
+ return 0;
+
++ /*
++ * If the AS number is greater than zero, then we can be sure
++ * the device is up and running, so we don't need to explicitly
++ * power it up
++ */
++
+ if (op != AS_COMMAND_UNLOCK)
+ lock_region(ptdev, as_nr, iova, size);
+
+@@ -874,14 +880,23 @@ static int panthor_vm_flush_range(struct panthor_vm *vm, u64 iova, u64 size)
+ if (!drm_dev_enter(&ptdev->base, &cookie))
+ return 0;
+
+- /* Flush the PTs only if we're already awake */
+- if (pm_runtime_active(ptdev->base.dev))
+- ret = mmu_hw_do_operation(vm, iova, size, AS_COMMAND_FLUSH_PT);
++ ret = mmu_hw_do_operation(vm, iova, size, AS_COMMAND_FLUSH_PT);
+
+ drm_dev_exit(cookie);
+ return ret;
+ }
+
++/**
++ * panthor_vm_flush_all() - Flush L2 caches for the entirety of a VM's AS
++ * @vm: VM whose cache to flush
++ *
++ * Return: 0 on success, a negative error code if flush failed.
++ */
++int panthor_vm_flush_all(struct panthor_vm *vm)
++{
++ return panthor_vm_flush_range(vm, vm->base.mm_start, vm->base.mm_range);
++}
++
+ static int panthor_vm_unmap_pages(struct panthor_vm *vm, u64 iova, u64 size)
+ {
+ struct panthor_device *ptdev = vm->ptdev;
+diff --git a/drivers/gpu/drm/panthor/panthor_mmu.h b/drivers/gpu/drm/panthor/panthor_mmu.h
+index f3c1ed19f973..6788771071e3 100644
+--- a/drivers/gpu/drm/panthor/panthor_mmu.h
++++ b/drivers/gpu/drm/panthor/panthor_mmu.h
+@@ -31,6 +31,7 @@ panthor_vm_get_bo_for_va(struct panthor_vm *vm, u64 va, u64 *bo_offset);
+ int panthor_vm_active(struct panthor_vm *vm);
+ void panthor_vm_idle(struct panthor_vm *vm);
+ int panthor_vm_as(struct panthor_vm *vm);
++int panthor_vm_flush_all(struct panthor_vm *vm);
+
+ struct panthor_heap_pool *
+ panthor_vm_get_heap_pool(struct panthor_vm *vm, bool create);
+--
+2.46.0
+
--- /dev/null
+From 5f7762042f8a5377bd8a32844db353c0311a7369 Mon Sep 17 00:00:00 2001
+From: Mary Guillemard <mary.guillemard@collabora.com>
+Date: Tue, 3 Sep 2024 16:49:55 +0200
+Subject: drm/panthor: Restrict high priorities on group_create
+
+From: Mary Guillemard <mary.guillemard@collabora.com>
+
+commit 5f7762042f8a5377bd8a32844db353c0311a7369 upstream.
+
+We were allowing any users to create a high priority group without any
+permission checks. As a result, this was allowing possible denial of
+service.
+
+We now only allow the DRM master or users with the CAP_SYS_NICE
+capability to set higher priorities than PANTHOR_GROUP_PRIORITY_MEDIUM.
+
+As the sole user of that uAPI lives in Mesa and hardcode a value of
+MEDIUM [1], this should be safe to do.
+
+Additionally, as those checks are performed at the ioctl level,
+panthor_group_create now only check for priority level validity.
+
+[1]https://gitlab.freedesktop.org/mesa/mesa/-/blob/f390835074bdf162a63deb0311d1a6de527f9f89/src/gallium/drivers/panfrost/pan_csf.c#L1038
+
+Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
+Fixes: de8548813824 ("drm/panthor: Add the scheduler logical block")
+Cc: stable@vger.kernel.org
+Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
+Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20240903144955.144278-2-mary.guillemard@collabora.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/panthor/panthor_drv.c | 23 +++++++++++++++++++++++
+ drivers/gpu/drm/panthor/panthor_sched.c | 2 +-
+ include/uapi/drm/panthor_drm.h | 6 +++++-
+ 3 files changed, 29 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/panthor/panthor_drv.c b/drivers/gpu/drm/panthor/panthor_drv.c
+index b5e7b919f241..34182f67136c 100644
+--- a/drivers/gpu/drm/panthor/panthor_drv.c
++++ b/drivers/gpu/drm/panthor/panthor_drv.c
+@@ -10,6 +10,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/pm_runtime.h>
+
++#include <drm/drm_auth.h>
+ #include <drm/drm_debugfs.h>
+ #include <drm/drm_drv.h>
+ #include <drm/drm_exec.h>
+@@ -996,6 +997,24 @@ static int panthor_ioctl_group_destroy(struct drm_device *ddev, void *data,
+ return panthor_group_destroy(pfile, args->group_handle);
+ }
+
++static int group_priority_permit(struct drm_file *file,
++ u8 priority)
++{
++ /* Ensure that priority is valid */
++ if (priority > PANTHOR_GROUP_PRIORITY_HIGH)
++ return -EINVAL;
++
++ /* Medium priority and below are always allowed */
++ if (priority <= PANTHOR_GROUP_PRIORITY_MEDIUM)
++ return 0;
++
++ /* Higher priorities require CAP_SYS_NICE or DRM_MASTER */
++ if (capable(CAP_SYS_NICE) || drm_is_current_master(file))
++ return 0;
++
++ return -EACCES;
++}
++
+ static int panthor_ioctl_group_create(struct drm_device *ddev, void *data,
+ struct drm_file *file)
+ {
+@@ -1011,6 +1030,10 @@ static int panthor_ioctl_group_create(struct drm_device *ddev, void *data,
+ if (ret)
+ return ret;
+
++ ret = group_priority_permit(file, args->priority);
++ if (ret)
++ return ret;
++
+ ret = panthor_group_create(pfile, args, queue_args);
+ if (ret >= 0) {
+ args->group_handle = ret;
+diff --git a/drivers/gpu/drm/panthor/panthor_sched.c b/drivers/gpu/drm/panthor/panthor_sched.c
+index 463bcd3cf00f..12b272a912f8 100644
+--- a/drivers/gpu/drm/panthor/panthor_sched.c
++++ b/drivers/gpu/drm/panthor/panthor_sched.c
+@@ -3092,7 +3092,7 @@ int panthor_group_create(struct panthor_file *pfile,
+ if (group_args->pad)
+ return -EINVAL;
+
+- if (group_args->priority > PANTHOR_CSG_PRIORITY_HIGH)
++ if (group_args->priority >= PANTHOR_CSG_PRIORITY_COUNT)
+ return -EINVAL;
+
+ if ((group_args->compute_core_mask & ~ptdev->gpu_info.shader_present) ||
+diff --git a/include/uapi/drm/panthor_drm.h b/include/uapi/drm/panthor_drm.h
+index 926b1deb1116..e23a7f9b0eac 100644
+--- a/include/uapi/drm/panthor_drm.h
++++ b/include/uapi/drm/panthor_drm.h
+@@ -692,7 +692,11 @@ enum drm_panthor_group_priority {
+ /** @PANTHOR_GROUP_PRIORITY_MEDIUM: Medium priority group. */
+ PANTHOR_GROUP_PRIORITY_MEDIUM,
+
+- /** @PANTHOR_GROUP_PRIORITY_HIGH: High priority group. */
++ /**
++ * @PANTHOR_GROUP_PRIORITY_HIGH: High priority group.
++ *
++ * Requires CAP_SYS_NICE or DRM_MASTER.
++ */
+ PANTHOR_GROUP_PRIORITY_HIGH,
+ };
+
+--
+2.46.0
+
btrfs-qgroup-don-t-use-extent-changeset-when-not-needed.patch
btrfs-zoned-handle-broken-write-pointer-on-zones.patch
drm-xe-gsc-do-not-attempt-to-load-the-gsc-multiple-times.patch
+drm-panthor-flush-fw-as-caches-in-slow-reset-path.patch
+drm-panthor-restrict-high-priorities-on-group_create.patch
+drm-imagination-free-pvr_vm_gpuva-after-unlink.patch
+drm-amdgpu-always-allocate-cleared-vram-for-gem-allocations.patch
+drm-i915-do-not-attempt-to-load-the-gsc-multiple-times.patch
+drm-amd-display-lock-dc-and-exit-ips-when-changing-backlight.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
