u32 mask = BIT(priv->resets[id].reset_bit);
u8 monbit = priv->resets[id].mon_bit;
u32 value = mask << 16;
+ int ret;
dev_dbg(rcdev->dev, "%s id:%ld offset:0x%x\n",
assert ? "assert" : "deassert", id, reg);
reg = GET_RST_MON_OFFSET(priv->resets[id].mon_index);
mask = BIT(monbit);
- return readl_poll_timeout_atomic(priv->base + reg, value,
- assert ? (value & mask) : !(value & mask),
- 10, 200);
+ ret = readl_poll_timeout_atomic(priv->base + reg, value,
+ assert ? (value & mask) : !(value & mask),
+ 10, 200);
+ if (ret && !assert) {
+ value = mask << 16;
+ writel(value, priv->base + GET_RST_OFFSET(priv->resets[id].reset_index));
+ }
+
+ return ret;
}
static int rzv2h_cpg_assert(struct reset_controller_dev *rcdev,