clk: renesas: rzv2h: Re-assert reset on deassert timeout

Prevent issues during reset deassertion by re-asserting the reset if a
timeout occurs when trying to deassert. This ensures the reset line is in a
known state and improves reliability for hardware that may not immediately
clear the reset monitor bit.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Link: https://lore.kernel.org/20250903082757.115778-4-tommaso.merciai.xr@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/rzv2h-cpg.c b/drivers/clk/renesas/rzv2h-cpg.c
index 58ccbae0f9046388e568f7da0b8a890dfa001c47..35c5ff38e231e4c1669fd71b977e68dd608851af 100644 (file)
--- a/drivers/clk/renesas/rzv2h-cpg.c
+++ b/drivers/clk/renesas/rzv2h-cpg.c
@@ -854,6 +854,7 @@ static int __rzv2h_cpg_assert(struct reset_controller_dev *rcdev,
        u32 mask = BIT(priv->resets[id].reset_bit);
        u8 monbit = priv->resets[id].mon_bit;
        u32 value = mask << 16;
+       int ret;
 
        dev_dbg(rcdev->dev, "%s id:%ld offset:0x%x\n",
                assert ? "assert" : "deassert", id, reg);
@@ -865,9 +866,15 @@ static int __rzv2h_cpg_assert(struct reset_controller_dev *rcdev,
        reg = GET_RST_MON_OFFSET(priv->resets[id].mon_index);
        mask = BIT(monbit);
 
-       return readl_poll_timeout_atomic(priv->base + reg, value,
-                                        assert ? (value & mask) : !(value & mask),
-                                        10, 200);
+       ret = readl_poll_timeout_atomic(priv->base + reg, value,
+                                       assert ? (value & mask) : !(value & mask),
+                                       10, 200);
+       if (ret && !assert) {
+               value = mask << 16;
+               writel(value, priv->base + GET_RST_OFFSET(priv->resets[id].reset_index));
+       }
+
+       return ret;
 }
 
 static int rzv2h_cpg_assert(struct reset_controller_dev *rcdev,