cpufreq/amd-pstate: Set different default EPP policy for Epyc and Ryzen

For Ryzen systems the EPP policy set by the BIOS is generally configured
to performance as this is the default register value for the CPPC request
MSR.

If a user doesn't use additional software to configure EPP then the system
will default biased towards performance and consume extra battery. Instead
configure the default to "balanced_performance" for this case.

Suggested-by: Artem S. Tashkinov <aros@gmx.com>
Reviewed-by: Dhananjay Ugwekar <dhananjay.ugwekar@amd.com>
Tested-by: Dhananjay Ugwekar <dhananjay.ugwekar@amd.com>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=219526
Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com>
Link: https://lore.kernel.org/r/20241209185248.16301-15-mario.limonciello@amd.com
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>

diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 4d665d9c76d3523e385a9787aa9081629aa3fec8..97aee213821d10a5d66bfe672917133f7e01d4fc 100644 (file)
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -1501,8 +1501,6 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
 
        policy->driver_data = cpudata;
 
-       cpudata->epp_cached = cpudata->epp_default = amd_pstate_get_epp(cpudata);
-
        policy->min = policy->cpuinfo.min_freq;
        policy->max = policy->cpuinfo.max_freq;
 
@@ -1513,10 +1511,13 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
         * the default cpufreq governor is neither powersave nor performance.
         */
        if (amd_pstate_acpi_pm_profile_server() ||
-           amd_pstate_acpi_pm_profile_undefined())
+           amd_pstate_acpi_pm_profile_undefined()) {
                policy->policy = CPUFREQ_POLICY_PERFORMANCE;
-       else
+               cpudata->epp_default = amd_pstate_get_epp(cpudata);
+       } else {
                policy->policy = CPUFREQ_POLICY_POWERSAVE;
+               cpudata->epp_default = AMD_CPPC_EPP_BALANCE_PERFORMANCE;
+       }
 
        if (cpu_feature_enabled(X86_FEATURE_CPPC)) {
                ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, &value);
@@ -1529,6 +1530,9 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy)
                        return ret;
                WRITE_ONCE(cpudata->cppc_cap1_cached, value);
        }
+       ret = amd_pstate_set_epp(cpudata, cpudata->epp_default);
+       if (ret)
+               return ret;
 
        current_pstate_driver->adjust_perf = NULL;