]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
net/mlx5: ifc: Reorganize mlx5_ifc_flow_table_context_bits
authorCosmin Ratiu <cratiu@nvidia.com>
Wed, 4 Dec 2024 22:09:21 +0000 (00:09 +0200)
committerLeon Romanovsky <leon@kernel.org>
Thu, 5 Dec 2024 09:19:49 +0000 (04:19 -0500)
The nested union at the end is not in the same style as the rest of the
code, so un-nest it to make the style uniformly applied again.

Signed-off-by: Cosmin Ratiu <cratiu@nvidia.com>
Reviewed-by: Saeed Mahameed <saeedm@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20241204220931.254964-2-tariqt@nvidia.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
include/linux/mlx5/mlx5_ifc.h

index 4fbbcf35498bbc98171de6802ace8d9f136f4ae9..f3650f989e686e6769271991a3a21b154f788f3d 100644 (file)
@@ -6324,6 +6324,20 @@ struct mlx5_ifc_modify_other_hca_cap_in_bits {
        struct     mlx5_ifc_other_hca_cap_bits other_capability;
 };
 
+struct mlx5_ifc_sw_owner_icm_root_params_bits {
+       u8         sw_owner_icm_root_1[0x40];
+
+       u8         sw_owner_icm_root_0[0x40];
+};
+
+struct mlx5_ifc_rtc_params_bits {
+       u8         rtc_id_0[0x20];
+
+       u8         rtc_id_1[0x20];
+
+       u8         reserved_at_40[0x40];
+};
+
 struct mlx5_ifc_flow_table_context_bits {
        u8         reformat_en[0x1];
        u8         decap_en[0x1];
@@ -6342,20 +6356,10 @@ struct mlx5_ifc_flow_table_context_bits {
        u8         lag_master_next_table_id[0x18];
 
        u8         reserved_at_60[0x60];
-       union {
-               struct {
-                       u8         sw_owner_icm_root_1[0x40];
-
-                       u8         sw_owner_icm_root_0[0x40];
-               } sws;
-               struct {
-                       u8         rtc_id_0[0x20];
 
-                       u8         rtc_id_1[0x20];
-
-                       u8         reserved_at_100[0x40];
-
-               } hws;
+       union {
+               struct mlx5_ifc_sw_owner_icm_root_params_bits sws;
+               struct mlx5_ifc_rtc_params_bits hws;
        };
 };