drm/amdgpu/mes12: mes hw_fini fix for mode1 reset

Port mes11 hw_fini to mes12, fix for mode1 reset.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
index 45b70a4c4adae8bd814d911245af9d297a10d679..f18fdda023c97b66b182f27f7e4a9f626d98828e 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
@@ -1380,11 +1380,12 @@ failure:
 
 static int mes_v12_0_kiq_hw_fini(struct amdgpu_device *adev)
 {
-       if (!adev->enable_uni_mes && adev->mes.ring.sched.ready)
+       if (adev->mes.ring.sched.ready) {
                mes_v12_0_kiq_dequeue_sched(adev);
+               adev->mes.ring.sched.ready = false;
+       }
 
-       if (!amdgpu_sriov_vf(adev))
-               mes_v12_0_enable(adev, false);
+       mes_v12_0_enable(adev, false);
 
        return 0;
 }