drm/i915: Extend GEN9_PIPE_PLANE_FLIP_DONE() to cover all universal planes

GEN9_PIPE_PLANE_FLIP_DONE() only works for planes 1-4. Extend
it handle planes 5-7 as well. Somewhat annoyingly the bits are
spread around into two distinct clumps.

Currently this doesn't achieve anything, but if we ever extend
async flip support to more than just the first plane then we'll
need this.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240605111832.21373-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 01112d15b86c42f2c967296102c5e4ad9dd7e315..2bb1c268b4751b7982d731e2d6e704bb06efcd4a 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2508,6 +2508,9 @@
 #define  GEN11_PIPE_PLANE6_FAULT       REG_BIT(21) /* icl/tgl */
 #define  GEN11_PIPE_PLANE5_FAULT       REG_BIT(20) /* icl+ */
 #define  GEN12_PIPE_VBLANK_UNMOD       REG_BIT(19) /* tgl+ */
+#define  GEN11_PIPE_PLANE7_FLIP_DONE   REG_BIT(18) /* icl/tgl */
+#define  GEN11_PIPE_PLANE6_FLIP_DONE   REG_BIT(17) /* icl/tgl */
+#define  GEN11_PIPE_PLANE5_FLIP_DONE   REG_BIT(16) /* icl+ */
 #define  GEN9_PIPE_CURSOR_FAULT                REG_BIT(11) /* skl+ */
 #define  GEN9_PIPE_PLANE4_FAULT                REG_BIT(10) /* skl+ */
 #define  GEN8_PIPE_CURSOR_FAULT                REG_BIT(10) /* bdw */
@@ -2522,7 +2525,8 @@
 #define  GEN9_PIPE_PLANE2_FLIP_DONE    REG_BIT(4) /* skl+ */
 #define  GEN8_PIPE_PRIMARY_FLIP_DONE   REG_BIT(4) /* bdw */
 #define  GEN9_PIPE_PLANE1_FLIP_DONE    REG_BIT(3) /* skl+ */
-#define  GEN9_PIPE_PLANE_FLIP_DONE(p)  REG_BIT(3 + (p)) /* skl+ */
+#define  GEN9_PIPE_PLANE_FLIP_DONE(plane_id) \
+       REG_BIT(((plane_id) >= PLANE_5 ? 16 - PLANE_5 : 3 - PLANE_1) + (plane_id)) /* skl+ */
 #define  GEN8_PIPE_SCAN_LINE_EVENT     REG_BIT(2)
 #define  GEN8_PIPE_VSYNC               REG_BIT(1)
 #define  GEN8_PIPE_VBLANK              REG_BIT(0)