dts: starfive: jh7110-common: split out mmc0 reset pins from common into boards

Prepare for Orange Pi RV using jh7110-common.dtsi having GPIO62 assignment
different than mmc0 reset by splitting this out into each board dts.

Signed-off-by: E Shattow <e@freeshell.de>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
index 5dc15e48b74b175ac61a209a96fcdd25af0929c3..083ec80b4e4473e9d75218c37c64ea4d863cece6 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
@@ -444,17 +444,6 @@
        };
 
        mmc0_pins: mmc0-0 {
-                rst-pins {
-                       pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
-                                             GPOEN_ENABLE,
-                                             GPI_NONE)>;
-                       bias-pull-up;
-                       drive-strength = <12>;
-                       input-disable;
-                       input-schmitt-disable;
-                       slew-rate = <0>;
-               };
-
                mmc-pins {
                        pinmux = <PINMUX(PAD_SD0_CLK, 0)>,
                                 <PINMUX(PAD_SD0_CMD, 0)>,

diff --git a/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts b/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts
index f2857d021d6812197dae5460a64dbc53155959a1..0243e54a84ed4570a5eed7e46907046e1d4e8e09 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts
@@ -11,6 +11,19 @@
        compatible = "deepcomputing,fml13v01", "starfive,jh7110";
 };
 
+&mmc0_pins {
+        rst-pins {
+               pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
+                                     GPOEN_ENABLE,
+                                     GPI_NONE)>;
+               bias-pull-up;
+               drive-strength = <12>;
+               input-disable;
+               input-schmitt-disable;
+               slew-rate = <0>;
+       };
+};
+
 &pcie1 {
        perst-gpios = <&sysgpio 21 GPIO_ACTIVE_LOW>;
        phys = <&pciephy1>;

diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
index fdaf6b4557da94d3f1043e1775e4b24aef897ff7..5ca10597dcd947b9b81486b4e6b2c983cf7c5838 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-mars.dts
@@ -22,6 +22,19 @@
        status = "okay";
 };
 
+&mmc0_pins {
+        rst-pins {
+               pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
+                                     GPOEN_ENABLE,
+                                     GPI_NONE)>;
+               bias-pull-up;
+               drive-strength = <12>;
+               input-disable;
+               input-schmitt-disable;
+               slew-rate = <0>;
+       };
+};
+
 &pcie0 {
        status = "okay";
 };

diff --git a/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi b/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi
index 25b70af564eea31f1af7c02fd5378e70b51e05d6..025471061d43913f2db92bd93cd5c15891efd3ec 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-milkv-marscm.dtsi
@@ -40,6 +40,19 @@
        status = "disabled";
 };
 
+&mmc0_pins {
+        rst-pins {
+               pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
+                                     GPOEN_ENABLE,
+                                     GPI_NONE)>;
+               bias-pull-up;
+               drive-strength = <12>;
+               input-disable;
+               input-schmitt-disable;
+               slew-rate = <0>;
+       };
+};
+
 &mmc1 {
        #address-cells = <1>;
        #size-cells = <0>;

diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
index 31e825be2065af19968bf4fb0bbc025494f44d6f..980e24e3dbc8fde88b0f377ec10d534171ce364b 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts
@@ -44,6 +44,19 @@
        status = "okay";
 };
 
+&mmc0_pins {
+        rst-pins {
+               pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
+                                     GPOEN_ENABLE,
+                                     GPI_NONE)>;
+               bias-pull-up;
+               drive-strength = <12>;
+               input-disable;
+               input-schmitt-disable;
+               slew-rate = <0>;
+       };
+};
+
 &pcie1 {
        status = "okay";
 };

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 5f14afb2c24dcf342433140068e86fa9bd52db40..574e128138c20ac651ece9118302744183a134f4 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -41,6 +41,19 @@
        non-removable;
 };
 
+&mmc0_pins {
+        rst-pins {
+               pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
+                                     GPOEN_ENABLE,
+                                     GPI_NONE)>;
+               bias-pull-up;
+               drive-strength = <12>;
+               input-disable;
+               input-schmitt-disable;
+               slew-rate = <0>;
+       };
+};
+
 &pcie0 {
        status = "okay";
 };