drm/amdgpu: Check vcn sram load return value

Log an error when vcn sram load fails in indirect mode
and return the same error value.

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index 68b4371df0f1baf98d9c37ab94c3256ed3435613..d1481e6d57ecd8677d92f2121a371e8ac2efedb5 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -865,6 +865,7 @@ static int vcn_v2_0_start_dpg_mode(struct amdgpu_vcn_inst *vinst, bool indirect)
        volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst->fw_shared.cpu_addr;
        struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec;
        uint32_t rb_bufsz, tmp;
+       int ret;
 
        vcn_v2_0_enable_static_power_gating(vinst);
 
@@ -948,8 +949,13 @@ static int vcn_v2_0_start_dpg_mode(struct amdgpu_vcn_inst *vinst, bool indirect)
                UVD, 0, mmUVD_MASTINT_EN),
                UVD_MASTINT_EN__VCPU_EN_MASK, 0, indirect);
 
-       if (indirect)
-               amdgpu_vcn_psp_update_sram(adev, 0, 0);
+       if (indirect) {
+               ret = amdgpu_vcn_psp_update_sram(adev, 0, 0);
+               if (ret) {
+                       dev_err(adev->dev, "vcn sram load failed %d\n", ret);
+                       return ret;
+               }
+       }
 
        /* force RBC into idle state */
        rb_bufsz = order_base_2(ring->ring_size);

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
index bc30a5326866c3cd5403ad2f6fc92f90f96ca7d6..d7b2668ab0d9482f27a9e9dcda883c87c76cd5a9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
@@ -1035,6 +1035,7 @@ static int vcn_v2_5_start_dpg_mode(struct amdgpu_vcn_inst *vinst, bool indirect)
        volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr;
        struct amdgpu_ring *ring;
        uint32_t rb_bufsz, tmp;
+       int ret;
 
        /* disable register anti-hang mechanism */
        WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, mmUVD_POWER_STATUS), 1,
@@ -1125,8 +1126,13 @@ static int vcn_v2_5_start_dpg_mode(struct amdgpu_vcn_inst *vinst, bool indirect)
                VCN, 0, mmUVD_MASTINT_EN),
                UVD_MASTINT_EN__VCPU_EN_MASK, 0, indirect);
 
-       if (indirect)
-               amdgpu_vcn_psp_update_sram(adev, inst_idx, 0);
+       if (indirect) {
+               ret = amdgpu_vcn_psp_update_sram(adev, inst_idx, 0);
+               if (ret) {
+                       dev_err(adev->dev, "vcn sram load failed %d\n", ret);
+                       return ret;
+               }
+       }
 
        ring = &adev->vcn.inst[inst_idx].ring_dec;
        /* force RBC into idle state */

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index 4b8f4407047fc081ff359aad1447d53d58c609a1..a89662c97c9ea4dea01d91d026179ceb4da8e33d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -1042,6 +1042,7 @@ static int vcn_v3_0_start_dpg_mode(struct amdgpu_vcn_inst *vinst, bool indirect)
        volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr;
        struct amdgpu_ring *ring;
        uint32_t rb_bufsz, tmp;
+       int ret;
 
        /* disable register anti-hang mechanism */
        WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, mmUVD_POWER_STATUS), 1,
@@ -1134,8 +1135,13 @@ static int vcn_v3_0_start_dpg_mode(struct amdgpu_vcn_inst *vinst, bool indirect)
        WREG32_SOC15_DPG_MODE(inst_idx, SOC15_DPG_MODE_OFFSET(
                VCN, inst_idx, mmUVD_VCPU_CNTL), tmp, 0, indirect);
 
-       if (indirect)
-               amdgpu_vcn_psp_update_sram(adev, inst_idx, 0);
+       if (indirect) {
+               ret = amdgpu_vcn_psp_update_sram(adev, inst_idx, 0);
+               if (ret) {
+                       dev_err(adev->dev, "vcn sram load failed %d\n", ret);
+                       return ret;
+               }
+       }
 
        ring = &adev->vcn.inst[inst_idx].ring_dec;
        /* force RBC into idle state */

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
index 1924e075b66f4173be08fdad3f5974b757e8bc67..e9f9cb16903487d6715a16b082f30f019bd23587 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
@@ -1012,6 +1012,7 @@ static int vcn_v4_0_start_dpg_mode(struct amdgpu_vcn_inst *vinst, bool indirect)
        volatile struct amdgpu_vcn4_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr;
        struct amdgpu_ring *ring;
        uint32_t tmp;
+       int ret;
 
        /* disable register anti-hang mechanism */
        WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, regUVD_POWER_STATUS), 1,
@@ -1094,8 +1095,13 @@ static int vcn_v4_0_start_dpg_mode(struct amdgpu_vcn_inst *vinst, bool indirect)
                UVD_MASTINT_EN__VCPU_EN_MASK, 0, indirect);
 
 
-       if (indirect)
-               amdgpu_vcn_psp_update_sram(adev, inst_idx, 0);
+       if (indirect) {
+               ret = amdgpu_vcn_psp_update_sram(adev, inst_idx, 0);
+               if (ret) {
+                       dev_err(adev->dev, "vcn sram load failed %d\n", ret);
+                       return ret;
+               }
+       }
 
        ring = &adev->vcn.inst[inst_idx].ring_enc[0];
 

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
index 2a3663b551af94b103ffe73943951986c4a78fd4..b904afc358ae248b6f95257bacf3eef7460d6a4a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
@@ -851,7 +851,7 @@ static int vcn_v4_0_3_start_dpg_mode(struct amdgpu_vcn_inst *vinst,
        volatile struct amdgpu_vcn4_fw_shared *fw_shared =
                                                adev->vcn.inst[inst_idx].fw_shared.cpu_addr;
        struct amdgpu_ring *ring;
-       int vcn_inst;
+       int vcn_inst, ret;
        uint32_t tmp;
 
        vcn_inst = GET_INST(VCN, inst_idx);
@@ -944,8 +944,13 @@ static int vcn_v4_0_3_start_dpg_mode(struct amdgpu_vcn_inst *vinst,
                VCN, 0, regUVD_MASTINT_EN),
                UVD_MASTINT_EN__VCPU_EN_MASK, 0, indirect);
 
-       if (indirect)
-               amdgpu_vcn_psp_update_sram(adev, inst_idx, AMDGPU_UCODE_ID_VCN0_RAM);
+       if (indirect) {
+               ret = amdgpu_vcn_psp_update_sram(adev, inst_idx, AMDGPU_UCODE_ID_VCN0_RAM);
+               if (ret) {
+                       dev_err(adev->dev, "vcn sram load failed %d\n", ret);
+                       return ret;
+               }
+       }
 
        ring = &adev->vcn.inst[inst_idx].ring_enc[0];
 

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
index caf2d95a85d433d45dcfa69e8fdc42d0356b861e..ed57e6431d4b518793dfb4cdc22f01be86418ca6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
@@ -926,6 +926,7 @@ static int vcn_v4_0_5_start_dpg_mode(struct amdgpu_vcn_inst *vinst,
        volatile struct amdgpu_vcn4_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr;
        struct amdgpu_ring *ring;
        uint32_t tmp;
+       int ret;
 
        /* disable register anti-hang mechanism */
        WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, regUVD_POWER_STATUS), 1,
@@ -1006,8 +1007,13 @@ static int vcn_v4_0_5_start_dpg_mode(struct amdgpu_vcn_inst *vinst,
                VCN, inst_idx, regUVD_MASTINT_EN),
                UVD_MASTINT_EN__VCPU_EN_MASK, 0, indirect);
 
-       if (indirect)
-               amdgpu_vcn_psp_update_sram(adev, inst_idx, 0);
+       if (indirect) {
+               ret = amdgpu_vcn_psp_update_sram(adev, inst_idx, 0);
+               if (ret) {
+                       dev_err(adev->dev, "vcn sram load failed %d\n", ret);
+                       return ret;
+               }
+       }
 
        ring = &adev->vcn.inst[inst_idx].ring_enc[0];
 

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
index 07a6e95828808a391179bc62f935934e1d5a4617..f8bb90fe764bbca36d7cf33f32a422a81b386234 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
@@ -713,6 +713,7 @@ static int vcn_v5_0_0_start_dpg_mode(struct amdgpu_vcn_inst *vinst,
        volatile struct amdgpu_vcn5_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr;
        struct amdgpu_ring *ring;
        uint32_t tmp;
+       int ret;
 
        /* disable register anti-hang mechanism */
        WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, regUVD_POWER_STATUS), 1,
@@ -766,8 +767,12 @@ static int vcn_v5_0_0_start_dpg_mode(struct amdgpu_vcn_inst *vinst,
                VCN, inst_idx, regUVD_MASTINT_EN),
                UVD_MASTINT_EN__VCPU_EN_MASK, 0, indirect);
 
-       if (indirect)
-               amdgpu_vcn_psp_update_sram(adev, inst_idx, 0);
+       if (indirect) {
+               ret = amdgpu_vcn_psp_update_sram(adev, inst_idx, 0);
+               dev_err(adev->dev, "%s: vcn sram load failed %d\n", __func__, ret);
+               if (ret)
+                       return ret;
+       }
 
        ring = &adev->vcn.inst[inst_idx].ring_enc[0];
 

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
index cdefd7fcb0da607d36e947c1eefe01c5dc71abdb..d8bbb937673180c74b047f9a56388516687b8afc 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c
@@ -605,7 +605,7 @@ static int vcn_v5_0_1_start_dpg_mode(struct amdgpu_vcn_inst *vinst,
                adev->vcn.inst[inst_idx].fw_shared.cpu_addr;
        struct amdgpu_ring *ring;
        struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__PAUSE};
-       int vcn_inst;
+       int vcn_inst, ret;
        uint32_t tmp;
 
        vcn_inst = GET_INST(VCN, inst_idx);
@@ -666,8 +666,13 @@ static int vcn_v5_0_1_start_dpg_mode(struct amdgpu_vcn_inst *vinst,
                VCN, 0, regUVD_MASTINT_EN),
                UVD_MASTINT_EN__VCPU_EN_MASK, 0, indirect);
 
-       if (indirect)
-               amdgpu_vcn_psp_update_sram(adev, inst_idx, AMDGPU_UCODE_ID_VCN0_RAM);
+       if (indirect) {
+               ret = amdgpu_vcn_psp_update_sram(adev, inst_idx, AMDGPU_UCODE_ID_VCN0_RAM);
+               if (ret) {
+                       dev_err(adev->dev, "vcn sram load failed %d\n", ret);
+                       return ret;
+               }
+       }
 
        /* resetting ring, fw should not check RB ring */
        fw_shared->sq.queue_mode |= FW_QUEUE_RING_RESET;