]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
clk/qcom: move ipq4019 driver from mach-ipq40xx
authorCaleb Connolly <caleb.connolly@linaro.org>
Tue, 7 Nov 2023 12:41:00 +0000 (12:41 +0000)
committerCaleb Connolly <caleb.connolly@linaro.org>
Tue, 16 Jan 2024 12:26:23 +0000 (12:26 +0000)
This driver is just a stub, but it's necessary to support the upcoming
reset driver changes.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
arch/arm/Kconfig
arch/arm/mach-ipq40xx/Makefile
drivers/clk/qcom/Kconfig
drivers/clk/qcom/Makefile
drivers/clk/qcom/clock-ipq4019.c [moved from arch/arm/mach-ipq40xx/clock-ipq4019.c with 56% similarity]
drivers/clk/qcom/clock-qcom.c

index 2d4458b7b56f6c84374eb67626e2546d3e961bae..294ab9d0a3f39bf8adbea20a0e1fd24ca192c5c0 100644 (file)
@@ -776,6 +776,7 @@ config ARCH_IPQ40XX
        select CLK
        select SMEM
        select OF_CONTROL
+       select CLK_QCOM_IPQ4019
        imply CMD_DM
 
 config ARCH_KEYSTONE
index 08a65b8854d3ce28ba65c64fa1e93faf153a8b41..b36a935c6f9f2930224eb5c350aa46730f675fe5 100644 (file)
@@ -4,6 +4,5 @@
 #
 # Author: Robert Marko <robert.marko@sartura.hr>
 
-obj-y += clock-ipq4019.o
 obj-y += pinctrl-snapdragon.o
 obj-y += pinctrl-ipq4019.o
index a884f077d9b9a43029fe8c9413ed3e319bb4bb43..0df0d1881a49637a89676376c75e4f51a6b62986 100644 (file)
@@ -23,6 +23,14 @@ config CLK_QCOM_APQ8096
          on the Snapdragon APQ8096 SoC. This driver supports the clocks
          and resets exposed by the GCC hardware block.
 
+config CLK_QCOM_IPQ4019
+       bool "Qualcomm IPQ4019 GCC"
+       select CLK_QCOM
+       help
+         Say Y here to enable support for the Global Clock Controller
+         on the Snapdragon IPQ4019 SoC. This driver supports the clocks
+         and resets exposed by the GCC hardware block.
+
 config CLK_QCOM_QCS404
        bool "Qualcomm QCS404 GCC"
        select CLK_QCOM
index 44d55583596d34bec551fb29f706b896ae04bfe3..cb179fdac5835395d3f7f51819bf6fd089b083d6 100644 (file)
@@ -6,4 +6,5 @@ obj-y += clock-qcom.o
 obj-$(CONFIG_CLK_QCOM_SDM845) += clock-sdm845.o
 obj-$(CONFIG_CLK_QCOM_APQ8016) += clock-apq8016.o
 obj-$(CONFIG_CLK_QCOM_APQ8096) += clock-apq8096.o
+obj-$(CONFIG_CLK_QCOM_IPQ4019) += clock-ipq4019.o
 obj-$(CONFIG_CLK_QCOM_QCS404) += clock-qcs404.o
similarity index 56%
rename from arch/arm/mach-ipq40xx/clock-ipq4019.c
rename to drivers/clk/qcom/clock-ipq4019.c
index c1d5c4ecdd81b8085ab8b53d623ab19c0329e095..04c99964df158cddb7dc0a3fc9865f7e44206210 100644 (file)
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
-
 #include <dt-bindings/clock/qcom,ipq4019-gcc.h>
 
-struct msm_clk_priv {
-       phys_addr_t base;
-};
+#include "clock-qcom.h"
 
 ulong msm_set_rate(struct clk *clk, ulong rate)
 {
@@ -30,23 +27,7 @@ ulong msm_set_rate(struct clk *clk, ulong rate)
        }
 }
 
-static int msm_clk_probe(struct udevice *dev)
-{
-       struct msm_clk_priv *priv = dev_get_priv(dev);
-
-       priv->base = dev_read_addr(dev);
-       if (priv->base == FDT_ADDR_T_NONE)
-               return -EINVAL;
-
-       return 0;
-}
-
-static ulong msm_clk_set_rate(struct clk *clk, ulong rate)
-{
-       return msm_set_rate(clk, rate);
-}
-
-static int msm_enable(struct clk *clk)
+int msm_enable(struct clk *clk)
 {
        switch (clk->id) {
        case GCC_BLSP1_QUP1_SPI_APPS_CLK: /*SPI1*/
@@ -68,21 +49,3 @@ static int msm_enable(struct clk *clk)
        }
 }
 
-static struct clk_ops msm_clk_ops = {
-       .set_rate = msm_clk_set_rate,
-       .enable = msm_enable,
-};
-
-static const struct udevice_id msm_clk_ids[] = {
-       { .compatible = "qcom,gcc-ipq4019" },
-       { }
-};
-
-U_BOOT_DRIVER(clk_msm) = {
-       .name           = "clk_msm",
-       .id             = UCLASS_CLK,
-       .of_match       = msm_clk_ids,
-       .ops            = &msm_clk_ops,
-       .priv_auto      = sizeof(struct msm_clk_priv),
-       .probe          = msm_clk_probe,
-};
index 5667abeb89a453d5e84573b02cc0407e27527f76..5914616fba5daf32d194b798b19fbb829cf45b1f 100644 (file)
@@ -166,6 +166,7 @@ static const struct udevice_id msm_clk_ids[] = {
        { .compatible = "qcom,gcc-apq8016" },
        { .compatible = "qcom,gcc-msm8996" },
        { .compatible = "qcom,gcc-apq8096" },
+       { .compatible = "qcom,gcc-ipq4019" },
        { .compatible = "qcom,gcc-sdm845" },
        { .compatible = "qcom,gcc-qcs404" },
        { }