arm64: dts: qcom: x1e80100: Fix up BAR space size for PCIe6a

As per memory map table, the region for PCIe6a is 64MByte. Hence, set the
size of 32 bit non-prefetchable memory region beginning on address
0x70300000 as 0x3d00000 so that BAR space assigned to BAR registers can be
allocated from 0x70300000 to 0x74000000.

Fixes: 7af141850012 ("arm64: dts: qcom: x1e80100: Fix up BAR spaces")
Cc: stable@vger.kernel.org
Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20241113080508.3458849-1-quic_qianyu@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 88805629ed2bf052ea6ec152794066217489cf52..f1a1e63f8ebcfe5d6d837c9555414898bc0b4076 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -2924,7 +2924,7 @@
                        #address-cells = <3>;
                        #size-cells = <2>;
                        ranges = <0x01000000 0x0 0x00000000 0x0 0x70200000 0x0 0x100000>,
-                                <0x02000000 0x0 0x70300000 0x0 0x70300000 0x0 0x1d00000>;
+                                <0x02000000 0x0 0x70300000 0x0 0x70300000 0x0 0x3d00000>;
                        bus-range = <0x00 0xff>;
 
                        dma-coherent;