<sys/platform/x86.h>: Add LBR support

Add architectural LBR support to <sys/platform/x86.h>.
Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>

diff --git a/manual/platform.texi b/manual/platform.texi
index 2ab687cbbaf1c6a134e3876cf39e39224b39b462..b72518ebd8b68383d455add35733325e996effa2 100644 (file)
--- a/manual/platform.texi
+++ b/manual/platform.texi
@@ -406,6 +406,9 @@ the indirect branch predictor barrier (IBPB).
 @item
 @code{LAM} -- Linear Address Masking.
 
+@item
+@code{LBR} -- Architectural LBR.
+
 @item
 @code{LM} -- Long mode.
 

diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h
index 6d9dd6dacf3b7e417bacda1509d53aca77062761..1040c2aed4fc438b76a0556654c7925b0b40d26e 100644 (file)
--- a/sysdeps/x86/bits/platform/x86.h
+++ b/sysdeps/x86/bits/platform/x86.h
@@ -219,7 +219,7 @@ enum
   x86_cpu_TSXLDTRK             = x86_cpu_index_7_edx + 16,
   x86_cpu_INDEX_7_EDX_17       = x86_cpu_index_7_edx + 17,
   x86_cpu_PCONFIG              = x86_cpu_index_7_edx + 18,
-  x86_cpu_INDEX_7_EDX_19       = x86_cpu_index_7_edx + 19,
+  x86_cpu_LBR                  = x86_cpu_index_7_edx + 19,
   x86_cpu_IBT                  = x86_cpu_index_7_edx + 20,
   x86_cpu_INDEX_7_EDX_21       = x86_cpu_index_7_edx + 21,
   x86_cpu_AMX_BF16             = x86_cpu_index_7_edx + 22,

diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c
index 8b7e70aee1d8fed02df0011b4a44013f8b44068a..cfc8692392f6f8b37589764ae6a3d34180a85017 100644 (file)
--- a/sysdeps/x86/tst-get-cpu-features.c
+++ b/sysdeps/x86/tst-get-cpu-features.c
@@ -166,6 +166,7 @@ do_test (void)
   CHECK_CPU_FEATURE_PRESENT (SERIALIZE);
   CHECK_CPU_FEATURE_PRESENT (HYBRID);
   CHECK_CPU_FEATURE_PRESENT (TSXLDTRK);
+  CHECK_CPU_FEATURE_PRESENT (LBR);
   CHECK_CPU_FEATURE_PRESENT (PCONFIG);
   CHECK_CPU_FEATURE_PRESENT (IBT);
   CHECK_CPU_FEATURE_PRESENT (AMX_BF16);