]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
arm: kirkwood: Dreamplug : Use Marvell uclass mvgbe and PHY driver for Ethernet
authorTony Dinh <mibodhi@gmail.com>
Sun, 30 Jan 2022 23:02:30 +0000 (15:02 -0800)
committerStefan Roese <sr@denx.de>
Thu, 10 Feb 2022 06:12:16 +0000 (07:12 +0100)
The Globalscale Technologies Dreamplug board has the network chip
Marvell 88E1116R. Use uclass mvgbe and the compatible driver M88E1310
driver to bring up Ethernet.

- Currently, CONFIG_RESET_PHY_R symbol is used in
arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood
boards with mv8831116 PHY, with each board defines the function
reset_phy(). Undefine it for this board.
- Add board_eth_init() to use uclass mvgbe to bring up both network
port 0 and 1. And remove ad-hoc code.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Add myself as maintainer (this board seems to be orphaned,
could not contact Jason Cooper using current email).
- Miscellaneous changes: Move constants to .c file and remove header file
board/Marvell/dreamplug/dreamplug.h, cleanup comments.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
board/Marvell/dreamplug/MAINTAINERS
board/Marvell/dreamplug/dreamplug.c
board/Marvell/dreamplug/dreamplug.h [deleted file]
configs/dreamplug_defconfig
include/configs/dreamplug.h

index 2561ba8134e409d37bc13bced2ec11bc8f107dfc..6bad3ea78b293f5e02e07aceec97eb1168588df5 100644 (file)
@@ -1,4 +1,5 @@
 DREAMPLUG BOARD
+M:     Tony Dinh <mibodhi@gmail.com>
 M:     Jason Cooper <u-boot@lakedaemon.net>
 S:     Maintained
 F:     board/Marvell/dreamplug/
index 7ba14021b2a1e086cec250680b91537cd0ecc631..d15faa1cb7ff813b09713ba4ccb056d983bc7d5a 100644 (file)
@@ -1,8 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright (C) 2021  Tony Dinh <mibodhi@gmail.com>
- * (C) Copyright 2011
- * Jason Cooper <u-boot@lakedaemon.net>
+ * Copyright (C) 2021-2022 Tony Dinh <mibodhi@gmail.com>
+ * Copyright (C) 2011 Jason Cooper <u-boot@lakedaemon.net>
  *
  * Based on work by:
  * Marvell Semiconductor <www.marvell.com>
 
 #include <common.h>
 #include <init.h>
-#include <miiphy.h>
-#include <net.h>
+#include <netdev.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include <asm/global_data.h>
-#include "dreamplug.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define DREAMPLUG_OE_LOW       (~(0))
+#define DREAMPLUG_OE_HIGH      (~(0))
+#define DREAMPLUG_OE_VAL_LOW   0
+#define DREAMPLUG_OE_VAL_HIGH  (0xf << 16) /* 4 LED Pins high */
+
 int board_early_init_f(void)
 {
        /*
@@ -90,83 +92,15 @@ int board_early_init_f(void)
        return 0;
 }
 
-int board_init(void)
-{
-       /* adress of boot parameters */
-       gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
-
-       return 0;
-}
-
-static int fdt_get_phy_addr(const char *path)
-{
-       const void *fdt = gd->fdt_blob;
-       const u32 *reg;
-       const u32 *val;
-       int node, phandle, addr;
-
-       /* Find the node by its full path */
-       node = fdt_path_offset(fdt, path);
-       if (node >= 0) {
-               /* Look up phy-handle */
-               val = fdt_getprop(fdt, node, "phy-handle", NULL);
-               if (val) {
-                       phandle = fdt32_to_cpu(*val);
-                       if (!phandle)
-                               return -1;
-                       /* Follow it to its node */
-                       node = fdt_node_offset_by_phandle(fdt, phandle);
-                       if (node) {
-                               /* Look up reg */
-                               reg = fdt_getprop(fdt, node, "reg", NULL);
-                               if (reg) {
-                                       addr = fdt32_to_cpu(*reg);
-                                       return addr;
-                               }
-                       }
-               }
-       }
-       return -1;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-void mv_phy_88e1116_init(const char *name, const char *path)
+int board_eth_init(struct bd_info *bis)
 {
-       u16 reg;
-       int phyaddr;
-
-       if (miiphy_set_current_dev(name))
-               return;
-
-       phyaddr = fdt_get_phy_addr(path);
-       if (phyaddr < 0)
-               return;
-
-       /*
-        * Enable RGMII delay on Tx and Rx for CPU port
-        * Ref: sec 4.7.2 of chip datasheet
-        */
-       miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2);
-       miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL2_REG, &reg);
-       reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
-       miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL2_REG, reg);
-       miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
-
-       /* reset the phy */
-       miiphy_reset(name, phyaddr);
-
-       printf("88E1116 Initialized on %s\n", name);
+       return cpu_eth_init(bis);
 }
 
-void reset_phy(void)
+int board_init(void)
 {
-       char *eth0_name = "ethernet-controller@72000";
-       char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0";
-       char *eth1_name = "ethernet-controller@76000";
-       char *eth1_path = "/ocp@f1000000/ethernet-controller@76000/ethernet1-port@0";
+       /* address of boot parameters */
+       gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
 
-       /* configure and initialize both PHY's */
-       mv_phy_88e1116_init(eth0_name, eth0_path);
-       mv_phy_88e1116_init(eth1_name, eth1_path);
+       return 0;
 }
-#endif /* CONFIG_RESET_PHY_R */
diff --git a/board/Marvell/dreamplug/dreamplug.h b/board/Marvell/dreamplug/dreamplug.h
deleted file mode 100644 (file)
index 6f62238..0000000
+++ /dev/null
@@ -1,25 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2011
- * Jason Cooper <u-boot@lakedaemon.net>
- *
- * Based on work by:
- * Marvell Semiconductor <www.marvell.com>
- * Written-by: Siddarth Gore <gores@marvell.com>
- */
-
-#ifndef __DREAMPLUG_H
-#define __DREAMPLUG_H
-
-#define DREAMPLUG_OE_LOW       (~(0))
-#define DREAMPLUG_OE_HIGH      (~(0))
-#define DREAMPLUG_OE_VAL_LOW   0
-#define DREAMPLUG_OE_VAL_HIGH  (0xf << 16) /* 4 LED Pins high */
-
-/* PHY related */
-#define MV88E1116_MAC_CTRL2_REG                21
-#define MV88E1116_PGADR_REG            22
-#define MV88E1116_RGMII_TXTM_CTRL      (1 << 4)
-#define MV88E1116_RGMII_RXTM_CTRL      (1 << 5)
-
-#endif /* __DREAMPLUG_H */
index 2d2b7f5ad3e7f8412eebe3ec0e1a29de7eeeae0b..72ab6956ee9477860c3e158deb9f671b9617ce08 100644 (file)
@@ -50,6 +50,7 @@ CONFIG_SYS_ATA_ALT_OFFSET=0x100
 CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_PHY_MARVELL=y
 CONFIG_DM_ETH=y
 CONFIG_MVGBE=y
 CONFIG_MII=y
index 0b3ee131ae6cd75abec18b7bd5c7aece5aca6617..fd12a391875a62796de67c0d0ac95913c293864a 100644 (file)
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * (C) Copyright 2011
- * Jason Cooper <u-boot@lakedaemon.net>
+ * (C) Copyright 2022 Tony Dinh <mibodhi@gmail.com>
+ * (C) Copyright 2011 Jason Cooper <u-boot@lakedaemon.net>
  *
  * Based on work by:
  * Marvell Semiconductor <www.marvell.com>
 
 #include "mv-common.h"
 
-/*
- *  Environment variables configurations
- */
-
-/*
- * max 4k env size is enough, but in case of nand
- * it has to be rounded to sector size
- */
-
 /*
  * Default environment variables
  */
 /*
  * Ethernet Driver configuration
  */
-#ifdef CONFIG_CMD_NET
 #define CONFIG_MVGBE_PORTS     {1, 1}  /* enable both ports */
 #define CONFIG_PHY_BASE_ADR    0
-#endif /* CONFIG_CMD_NET */
+#ifdef CONFIG_RESET_PHY_R
+#undef CONFIG_RESET_PHY_R      /* remove legacy reset_phy() */
+#endif
 
 /*
  * SATA Driver configuration
  */
-#ifdef CONFIG_SATA
 #define CONFIG_LBA48
-#endif /* CONFIG_SATA */
 
 #endif /* _CONFIG_DREAMPLUG_H */