MIPS: Add i6500 processor as an alias for i6400.

gcc/ChangeLog:

2018-06-12  Matthew Fortune  <mfortune@gmail.com>

	* config/mips/mips-cpus.def: New MIPS_CPU for i6500.
	* config/mips/mips-tables.opt: Regenerate.
	* config/mips/mips.h (MIPS_ISA_LEVEL_SPEC): Mark i6500 as
	mips64r6.
	* doc/invoke.texi: Document -march=i6500.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@261490 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index afec6b93106cd60c455e54ad25b34ec6dc7f9be3..0b77ed1af1ade1e656aed23b00f60c55f9a1458f 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2018-06-12  Matthew Fortune  <mfortune@gmail.com>
+
+       * config/mips/mips-cpus.def: New MIPS_CPU for i6500.
+       * config/mips/mips-tables.opt: Regenerate.
+       * config/mips/mips.h (MIPS_ISA_LEVEL_SPEC): Mark i6500 as
+       mips64r6.
+       * doc/invoke.texi: Document -march=i6500.
+
 2018-06-12  Prachi Godbole  <prachi.godbole@imgtec.com>
 
        * config/mips/i6400.md (i6400_gpmuldiv): Remove cpu_unit.

diff --git a/gcc/config/mips/mips-cpus.def b/gcc/config/mips/mips-cpus.def
index d0640e52ba6bcaca051768c5358488c41b184cd4..7314335f147b6d121c4cc79ea02013bff7e316b7 100644 (file)
--- a/gcc/config/mips/mips-cpus.def
+++ b/gcc/config/mips/mips-cpus.def
@@ -171,3 +171,4 @@ MIPS_CPU ("xlp", PROCESSOR_XLP, 65, PTF_AVOID_BRANCHLIKELY_SPEED)
 
 /* MIPS64 Release 6 processors.  */
 MIPS_CPU ("i6400", PROCESSOR_I6400, 69, 0)
+MIPS_CPU ("i6500", PROCESSOR_I6400, 69, 0)

diff --git a/gcc/config/mips/mips-tables.opt b/gcc/config/mips/mips-tables.opt
index daccefb1c7cabc9308bdeef65ecfd65b79cbd572..d8e50b298b5ee92cfa7138aafccecdf43dfffc24 100644 (file)
--- a/gcc/config/mips/mips-tables.opt
+++ b/gcc/config/mips/mips-tables.opt
@@ -696,3 +696,6 @@ Enum(mips_arch_opt_value) String(xlp) Value(101) Canonical
 EnumValue
 Enum(mips_arch_opt_value) String(i6400) Value(102) Canonical
 
+EnumValue
+Enum(mips_arch_opt_value) String(i6500) Value(103) Canonical
+

diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index f29056016c627a79920e4cb72f360e77cec2b434..705434eca39a3101e8b1b875f16d6447bcdf7069 100644 (file)
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -782,7 +782,7 @@ struct mips_cpu_info {
      %{march=mips64r2|march=loongson3a|march=octeon|march=xlp: -mips64r2} \
      %{march=mips64r3: -mips64r3} \
      %{march=mips64r5: -mips64r5} \
-     %{march=mips64r6|march=i6400: -mips64r6}}"
+     %{march=mips64r6|march=i6400|march=i6500: -mips64r6}}"
 
 /* A spec that injects the default multilib ISA if no architecture is
    specified.  */

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 5c8f66c86ce000515a92d6fc1dc319f136649e7c..b06ea6e73685d993097afb19de27c8cb43d477b1 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -20099,7 +20099,7 @@ The processor names are:
 @samp{34kc}, @samp{34kf2_1}, @samp{34kf1_1}, @samp{34kn},
 @samp{74kc}, @samp{74kf2_1}, @samp{74kf1_1}, @samp{74kf3_2},
 @samp{1004kc}, @samp{1004kf2_1}, @samp{1004kf1_1},
-@samp{i6400},
+@samp{i6400}, @samp{i6500},
 @samp{interaptiv},
 @samp{loongson2e}, @samp{loongson2f}, @samp{loongson3a},
 @samp{m4k},