3.10-stable patches

added patches:
	drm-i915-initialize-gt_lock-early-with-other-spin-locks.patch
	drm-radeon-fix-halting-uvd.patch

diff --git a/queue-3.10/drm-i915-initialize-gt_lock-early-with-other-spin-locks.patch b/queue-3.10/drm-i915-initialize-gt_lock-early-with-other-spin-locks.patch
new file mode 100644 (file)
index 0000000..3409f2e
--- /dev/null
+++ b/queue-3.10/drm-i915-initialize-gt_lock-early-with-other-spin-locks.patch
@@ -0,0 +1,51 @@
+From 14c5cec5d0cd73e7e9d4fbea2bbfeea8f3ade871 Mon Sep 17 00:00:00 2001
+From: Jani Nikula <jani.nikula@linux.intel.com>
+Date: Thu, 25 Jul 2013 12:44:34 +0300
+Subject: drm/i915: initialize gt_lock early with other spin locks
+
+From: Jani Nikula <jani.nikula@linux.intel.com>
+
+commit 14c5cec5d0cd73e7e9d4fbea2bbfeea8f3ade871 upstream.
+
+commit 181d1b9e31c668259d3798c521672afb8edd355c
+Author: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date:   Sun Jul 21 13:16:24 2013 +0200
+
+    drm/i915: fix up gt init sequence fallout
+
+moved dev_priv->gt_lock initialization after use. Do the initialization
+much earlier with other spin lock initializations.
+
+Reported-by: Sedat Dilek <sedat.dilek@gmail.com>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Zhouping Liu <zliu@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/i915_dma.c |    1 +
+ drivers/gpu/drm/i915/intel_pm.c |    2 --
+ 2 files changed, 1 insertion(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/i915/i915_dma.c
++++ b/drivers/gpu/drm/i915/i915_dma.c
+@@ -1514,6 +1514,7 @@ int i915_driver_load(struct drm_device *
+       spin_lock_init(&dev_priv->irq_lock);
+       spin_lock_init(&dev_priv->gpu_error.lock);
+       spin_lock_init(&dev_priv->rps.lock);
++      spin_lock_init(&dev_priv->gt_lock);
+       mutex_init(&dev_priv->dpio_lock);
+       mutex_init(&dev_priv->rps.hw_lock);
+       mutex_init(&dev_priv->modeset_restore_lock);
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -4507,8 +4507,6 @@ void intel_gt_init(struct drm_device *de
+ {
+       struct drm_i915_private *dev_priv = dev->dev_private;
+ 
+-      spin_lock_init(&dev_priv->gt_lock);
+-
+       if (IS_VALLEYVIEW(dev)) {
+               dev_priv->gt.force_wake_get = vlv_force_wake_get;
+               dev_priv->gt.force_wake_put = vlv_force_wake_put;

diff --git a/queue-3.10/drm-radeon-fix-halting-uvd.patch b/queue-3.10/drm-radeon-fix-halting-uvd.patch
new file mode 100644 (file)
index 0000000..9b403c8
--- /dev/null
+++ b/queue-3.10/drm-radeon-fix-halting-uvd.patch
@@ -0,0 +1,180 @@
+From 2858c00d2823c83acce2a1175dbabb2cebee8678 Mon Sep 17 00:00:00 2001
+From: Christian König <christian.koenig@amd.com>
+Date: Thu, 1 Aug 2013 17:34:07 +0200
+Subject: drm/radeon: fix halting UVD
+
+From: Christian König <christian.koenig@amd.com>
+
+commit 2858c00d2823c83acce2a1175dbabb2cebee8678 upstream.
+
+Removing the clock/power or resetting the VCPU can cause
+hangs if that happens in the middle of a register write.
+
+Stall the memory and register bus before putting the VCPU
+into reset. Keep it in reset when unloading the module or
+suspending.
+
+v2: rebased on 3.10-stable tree
+
+Signed-off-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/evergreen.c   |    3 ++-
+ drivers/gpu/drm/radeon/ni.c          |    3 ++-
+ drivers/gpu/drm/radeon/r600.c        |   28 +++++++++++++++++++++++-----
+ drivers/gpu/drm/radeon/radeon_asic.h |    2 +-
+ drivers/gpu/drm/radeon/rv770.c       |    2 ++
+ drivers/gpu/drm/radeon/si.c          |    6 ++++--
+ 6 files changed, 34 insertions(+), 10 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/evergreen.c
++++ b/drivers/gpu/drm/radeon/evergreen.c
+@@ -4854,10 +4854,10 @@ int evergreen_resume(struct radeon_devic
+ int evergreen_suspend(struct radeon_device *rdev)
+ {
+       r600_audio_fini(rdev);
++      r600_uvd_stop(rdev);
+       radeon_uvd_suspend(rdev);
+       r700_cp_stop(rdev);
+       r600_dma_stop(rdev);
+-      r600_uvd_rbc_stop(rdev);
+       evergreen_irq_suspend(rdev);
+       radeon_wb_disable(rdev);
+       evergreen_pcie_gart_disable(rdev);
+@@ -4988,6 +4988,7 @@ void evergreen_fini(struct radeon_device
+       radeon_ib_pool_fini(rdev);
+       radeon_irq_kms_fini(rdev);
+       evergreen_pcie_gart_fini(rdev);
++      r600_uvd_stop(rdev);
+       radeon_uvd_fini(rdev);
+       r600_vram_scratch_fini(rdev);
+       radeon_gem_fini(rdev);
+--- a/drivers/gpu/drm/radeon/ni.c
++++ b/drivers/gpu/drm/radeon/ni.c
+@@ -2133,7 +2133,7 @@ int cayman_suspend(struct radeon_device
+       radeon_vm_manager_fini(rdev);
+       cayman_cp_enable(rdev, false);
+       cayman_dma_stop(rdev);
+-      r600_uvd_rbc_stop(rdev);
++      r600_uvd_stop(rdev);
+       radeon_uvd_suspend(rdev);
+       evergreen_irq_suspend(rdev);
+       radeon_wb_disable(rdev);
+@@ -2265,6 +2265,7 @@ void cayman_fini(struct radeon_device *r
+       radeon_vm_manager_fini(rdev);
+       radeon_ib_pool_fini(rdev);
+       radeon_irq_kms_fini(rdev);
++      r600_uvd_stop(rdev);
+       radeon_uvd_fini(rdev);
+       cayman_pcie_gart_fini(rdev);
+       r600_vram_scratch_fini(rdev);
+--- a/drivers/gpu/drm/radeon/r600.c
++++ b/drivers/gpu/drm/radeon/r600.c
+@@ -2675,12 +2675,29 @@ int r600_uvd_rbc_start(struct radeon_dev
+       return 0;
+ }
+ 
+-void r600_uvd_rbc_stop(struct radeon_device *rdev)
++void r600_uvd_stop(struct radeon_device *rdev)
+ {
+       struct radeon_ring *ring = &rdev->ring[R600_RING_TYPE_UVD_INDEX];
+ 
+       /* force RBC into idle state */
+       WREG32(UVD_RBC_RB_CNTL, 0x11010101);
++
++      /* Stall UMC and register bus before resetting VCPU */
++      WREG32_P(UVD_LMI_CTRL2, 1 << 8, ~(1 << 8));
++      WREG32_P(UVD_RB_ARB_CTRL, 1 << 3, ~(1 << 3));
++      mdelay(1);
++
++      /* put VCPU into reset */
++      WREG32(UVD_SOFT_RESET, VCPU_SOFT_RESET);
++      mdelay(5);
++
++      /* disable VCPU clock */
++      WREG32(UVD_VCPU_CNTL, 0x0);
++
++      /* Unstall UMC and register bus */
++      WREG32_P(UVD_LMI_CTRL2, 0, ~(1 << 8));
++      WREG32_P(UVD_RB_ARB_CTRL, 0, ~(1 << 3));
++
+       ring->ready = false;
+ }
+ 
+@@ -2700,6 +2717,11 @@ int r600_uvd_init(struct radeon_device *
+       /* disable interupt */
+       WREG32_P(UVD_MASTINT_EN, 0, ~(1 << 1));
+ 
++      /* Stall UMC and register bus before resetting VCPU */
++      WREG32_P(UVD_LMI_CTRL2, 1 << 8, ~(1 << 8));
++      WREG32_P(UVD_RB_ARB_CTRL, 1 << 3, ~(1 << 3));
++      mdelay(1);
++
+       /* put LMI, VCPU, RBC etc... into reset */
+       WREG32(UVD_SOFT_RESET, LMI_SOFT_RESET | VCPU_SOFT_RESET |
+              LBSI_SOFT_RESET | RBC_SOFT_RESET | CSM_SOFT_RESET |
+@@ -2729,10 +2751,6 @@ int r600_uvd_init(struct radeon_device *
+       WREG32(UVD_MPC_SET_ALU, 0);
+       WREG32(UVD_MPC_SET_MUX, 0x88);
+ 
+-      /* Stall UMC */
+-      WREG32_P(UVD_LMI_CTRL2, 1 << 8, ~(1 << 8));
+-      WREG32_P(UVD_RB_ARB_CTRL, 1 << 3, ~(1 << 3));
+-
+       /* take all subblocks out of reset, except VCPU */
+       WREG32(UVD_SOFT_RESET, VCPU_SOFT_RESET);
+       mdelay(5);
+--- a/drivers/gpu/drm/radeon/radeon_asic.h
++++ b/drivers/gpu/drm/radeon/radeon_asic.h
+@@ -399,7 +399,7 @@ uint64_t r600_get_gpu_clock_counter(stru
+ /* uvd */
+ int r600_uvd_init(struct radeon_device *rdev);
+ int r600_uvd_rbc_start(struct radeon_device *rdev);
+-void r600_uvd_rbc_stop(struct radeon_device *rdev);
++void r600_uvd_stop(struct radeon_device *rdev);
+ int r600_uvd_ib_test(struct radeon_device *rdev, struct radeon_ring *ring);
+ void r600_uvd_fence_emit(struct radeon_device *rdev,
+                        struct radeon_fence *fence);
+--- a/drivers/gpu/drm/radeon/rv770.c
++++ b/drivers/gpu/drm/radeon/rv770.c
+@@ -1983,6 +1983,7 @@ int rv770_resume(struct radeon_device *r
+ int rv770_suspend(struct radeon_device *rdev)
+ {
+       r600_audio_fini(rdev);
++      r600_uvd_stop(rdev);
+       radeon_uvd_suspend(rdev);
+       r700_cp_stop(rdev);
+       r600_dma_stop(rdev);
+@@ -2098,6 +2099,7 @@ void rv770_fini(struct radeon_device *rd
+       radeon_ib_pool_fini(rdev);
+       radeon_irq_kms_fini(rdev);
+       rv770_pcie_gart_fini(rdev);
++      r600_uvd_stop(rdev);
+       radeon_uvd_fini(rdev);
+       r600_vram_scratch_fini(rdev);
+       radeon_gem_fini(rdev);
+--- a/drivers/gpu/drm/radeon/si.c
++++ b/drivers/gpu/drm/radeon/si.c
+@@ -5473,7 +5473,7 @@ int si_suspend(struct radeon_device *rde
+       si_cp_enable(rdev, false);
+       cayman_dma_stop(rdev);
+       if (rdev->has_uvd) {
+-              r600_uvd_rbc_stop(rdev);
++              r600_uvd_stop(rdev);
+               radeon_uvd_suspend(rdev);
+       }
+       si_irq_suspend(rdev);
+@@ -5613,8 +5613,10 @@ void si_fini(struct radeon_device *rdev)
+       radeon_vm_manager_fini(rdev);
+       radeon_ib_pool_fini(rdev);
+       radeon_irq_kms_fini(rdev);
+-      if (rdev->has_uvd)
++      if (rdev->has_uvd) {
++              r600_uvd_stop(rdev);
+               radeon_uvd_fini(rdev);
++      }
+       si_pcie_gart_fini(rdev);
+       r600_vram_scratch_fini(rdev);
+       radeon_gem_fini(rdev);

diff --git a/queue-3.10/series b/queue-3.10/series
index f703339f8eb5ccba604b68c2e10c7986678043ac..8dc068ea56a721edd1227f790248056fc17156e5 100644 (file)
--- a/queue-3.10/series
+++ b/queue-3.10/series
@@ -51,3 +51,5 @@ zram-allow-request-end-to-coincide-with-disksize.patch
 usb-core-don-t-try-to-reset_device-a-port-that-got-just-disconnected.patch
 debugfs-debugfs_remove_recursive-must-not-rely-on-list_empty-d_subdirs.patch
 reiserfs-fix-deadlock-in-umount.patch
+drm-i915-initialize-gt_lock-early-with-other-spin-locks.patch
+drm-radeon-fix-halting-uvd.patch