]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
net: stmmac: use STMMAC_CSR_xxx definitions in platform glue
authorRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Thu, 4 Sep 2025 12:11:51 +0000 (13:11 +0100)
committerJakub Kicinski <kuba@kernel.org>
Tue, 9 Sep 2025 01:12:03 +0000 (18:12 -0700)
Use the STMMAC_CSR_xxx definitions to initialise plat->clk_csr in the
platform glue drivers to make the integer values meaningful.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com>
Link: https://patch.msgid.link/E1uu8oh-00000001vpT-0vk2@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c

index 3ff271b097ea50bf9a0a52426c591b8a66f32402..e74d00984b889e900b86039b1f9dfd42b0b6464f 100644 (file)
@@ -563,7 +563,8 @@ static int intel_mac_finish(struct net_device *ndev,
 
 static void common_default_data(struct plat_stmmacenet_data *plat)
 {
-       plat->clk_csr = 2;      /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
+       /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
+       plat->clk_csr = STMMAC_CSR_20_35M;
        plat->has_gmac = 1;
        plat->force_sf_dma_mode = 1;
 
@@ -610,7 +611,7 @@ static int intel_mgbe_common_data(struct pci_dev *pdev,
 
        plat->pdev = pdev;
        plat->phy_addr = -1;
-       plat->clk_csr = 5;
+       plat->clk_csr = STMMAC_CSR_250_300M;
        plat->has_gmac = 0;
        plat->has_gmac4 = 1;
        plat->force_sf_dma_mode = 0;
index 6fca0fca4892dc0da67725978bcaaa1ff6266869..dd82dc2189e9cf5929109e711cf08635247115cb 100644 (file)
@@ -90,7 +90,8 @@ static void loongson_default_data(struct pci_dev *pdev,
        /* Get bus_id, this can be overwritten later */
        plat->bus_id = pci_dev_id(pdev);
 
-       plat->clk_csr = 2;      /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
+       /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
+       plat->clk_csr = STMMAC_CSR_20_35M;
        plat->has_gmac = 1;
        plat->force_sf_dma_mode = 1;
 
index e6a7d0ddac2a4a72f3387b57ac576f09380f860f..4e3aa611fda83f9e7f6e91d9891ff47539c9688b 100644 (file)
@@ -21,7 +21,8 @@ struct stmmac_pci_info {
 
 static void common_default_data(struct plat_stmmacenet_data *plat)
 {
-       plat->clk_csr = 2;      /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
+       /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
+       plat->clk_csr = STMMAC_CSR_20_35M;
        plat->has_gmac = 1;
        plat->force_sf_dma_mode = 1;
 
@@ -74,7 +75,7 @@ static int snps_gmac5_default_data(struct pci_dev *pdev,
 {
        int i;
 
-       plat->clk_csr = 5;
+       plat->clk_csr = STMMAC_CSR_250_300M;
        plat->has_gmac4 = 1;
        plat->force_sf_dma_mode = 1;
        plat->flags |= STMMAC_FLAG_TSO_EN;