+2014-05-13 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * rtl.def (REG): Remove middle field.
+ * rtl.h (rtx_def): Add orignal_regno to u2.
+ (ORIGINAL_REGNO): Use it instead of field 1.
+ (REG_ATTRS): Lower field index accordingly.
+ * gengtype.c (adjust_field_rtx_def): Remove handling of
+ ORIGINAL_REGNO. Move REG_ATTRS index down.
+ * print-rtl.c (print_rtx): Move ORIGINAL_REGNO handling to the
+ code that prints the REGNO.
+
2014-05-13 Richard Sandiford <rdsandiford@googlemail.com>
* print-rtl.c (print_rtx): Guard whole '0' block with ifndef
else if (i == DEBUG_EXPR && aindex == 0)
t = tree_tp, subname = "rt_tree";
else if (i == REG && aindex == 1)
- t = scalar_tp, subname = "rt_int";
- else if (i == REG && aindex == 2)
t = reg_attrs_tp, subname = "rt_reg";
else if (i == SCRATCH && aindex == 0)
t = scalar_tp, subname = "rt_int";
that the field has several different valid contents. */
case '0':
#ifndef GENERATOR_FILE
- if (i == 1 && REG_P (in_rtx))
- {
- if (REGNO (in_rtx) != ORIGINAL_REGNO (in_rtx))
- fprintf (outfile, " [%d]", ORIGINAL_REGNO (in_rtx));
- }
- else if (i == 1 && GET_CODE (in_rtx) == SYMBOL_REF)
+ if (i == 1 && GET_CODE (in_rtx) == SYMBOL_REF)
{
int flags = SYMBOL_REF_FLAGS (in_rtx);
if (flags)
REG_OFFSET (in_rtx));
fputs (" ]", outfile);
}
+ if (REG_P (in_rtx) && REGNO (in_rtx) != ORIGINAL_REGNO (in_rtx))
+ fprintf (outfile, " [%d]", ORIGINAL_REGNO (in_rtx));
#endif
if (is_insn && &INSN_CODE (in_rtx) == &XINT (in_rtx, i)
/* A register. The "operand" is the register number, accessed with
the REGNO macro. If this number is less than FIRST_PSEUDO_REGISTER
than a hardware register is being referred to. The second operand
- holds the original register number - this will be different for a
- pseudo register that got turned into a hard register. The third
- operand points to a reg_attrs structure.
+ points to a reg_attrs structure.
This rtx needs to have as many (or more) fields as a MEM, since we
can change REG rtx's into MEMs during reload. */
-DEF_RTL_EXPR(REG, "reg", "i00", RTX_OBJ)
+DEF_RTL_EXPR(REG, "reg", "i0", RTX_OBJ)
/* A scratch register. This represents a register used only within a
single insn. It will be turned into a REG during register allocation
layout for that case and use the gap for extra code-specific
information. */
+ /* The ORIGINAL_REGNO of a REG. */
+ unsigned int original_regno;
+
/* In a CONST_WIDE_INT (aka hwivec_def), this is the number of
HOST_WIDE_INTs in the hwivec_def. */
unsigned int num_elem;
/* ORIGINAL_REGNO holds the number the register originally had; for a
pseudo register turned into a hard reg this will hold the old pseudo
register number. */
-#define ORIGINAL_REGNO(RTX) X0UINT (RTX, 1)
+#define ORIGINAL_REGNO(RTX) \
+ (RTL_FLAG_CHECK1 ("ORIGINAL_REGNO", (RTX), REG)->u2.original_regno)
/* Force the REGNO macro to only be used on the lhs. */
static inline unsigned int
/* The register attribute block. We provide access macros for each value
in the block and provide defaults if none specified. */
-#define REG_ATTRS(RTX) X0REGATTR (RTX, 2)
+#define REG_ATTRS(RTX) X0REGATTR (RTX, 1)
#ifndef GENERATOR_FILE
/* For a MEM rtx, the alias set. If 0, this MEM is not in any alias