drm/i915/display: BMG supports UHBR13.5

UHBR20 is not supported by battlemage and the maximum link rate
supported is UHBR13.5

v2: Replace IS_DGFX with IS_BATTLEMAGE (Jani)

HSD: 16023263677
Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Fixes: 98b1c87a5e51 ("drm/i915/xe2hpd: Set maximum DP rate to UHBR13.5")
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240827081205.136569-1-arun.r.murthy@intel.com
(cherry picked from commit 9c2338ac4543e0fab3a1e0f9f025591e0f0d9f8f)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index a1fcedfd404b9ba840c13a470e80f987a3450c26..b1b512e258abcb3d0c2c98970ba4f4f69fff611c 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -531,6 +531,10 @@ static void
 intel_dp_set_source_rates(struct intel_dp *intel_dp)
 {
        /* The values must be in increasing order */
+       static const int bmg_rates[] = {
+               162000, 216000, 243000, 270000, 324000, 432000, 540000, 675000,
+               810000, 1000000, 1350000,
+       };
        static const int mtl_rates[] = {
                162000, 216000, 243000, 270000, 324000, 432000, 540000, 675000,
                810000, 1000000, 2000000,
@@ -561,8 +565,13 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp)
                    intel_dp->source_rates || intel_dp->num_source_rates);
 
        if (DISPLAY_VER(dev_priv) >= 14) {
-               source_rates = mtl_rates;
-               size = ARRAY_SIZE(mtl_rates);
+               if (IS_BATTLEMAGE(dev_priv)) {
+                       source_rates = bmg_rates;
+                       size = ARRAY_SIZE(bmg_rates);
+               } else {
+                       source_rates = mtl_rates;
+                       size = ARRAY_SIZE(mtl_rates);
+               }
                max_rate = mtl_max_source_rate(intel_dp);
        } else if (DISPLAY_VER(dev_priv) >= 11) {
                source_rates = icl_rates;