arch/sh/kernel/cpu/init.c:99:29: warning: no previous prototype for 'l2_cache_init' [-Wmissing-prototypes]
arch/sh/kernel/cpu/sh4a/setup-sh7723.c:422:6: warning: no previous prototype for 'l2_cache_init' [-Wmissing-prototypes]
arch/sh/kernel/cpu/sh4a/setup-sh7724.c:842:6: warning: no previous prototype for 'l2_cache_init' [-Wmissing-prototypes]
arch/sh/mm/cache-j2.c:48:13: warning: no previous prototype for 'j2_cache_init' [-Wmissing-prototypes]
arch/sh/mm/cache-sh2.c:85:13: warning: no previous prototype for 'sh2_cache_init' [-Wmissing-prototypes]
arch/sh/mm/cache-sh2a.c:181:13: warning: no previous prototype for 'sh2a_cache_init' [-Wmissing-prototypes]
arch/sh/mm/cache-sh3.c:90:13: warning: no previous prototype for 'sh3_cache_init' [-Wmissing-prototypes]
arch/sh/mm/cache-sh4.c:384:13: warning: no previous prototype for 'sh4_cache_init' [-Wmissing-prototypes]
arch/sh/mm/cache-shx3.c:18:13: warning: no previous prototype for 'shx3_cache_init' [-Wmissing-prototypes]
arch/sh/mm/flush-sh4.c:106:13: warning: no previous prototype for 'sh4__flush_region_init' [-Wmissing-prototypes]
arch/sh/mm/cache-sh7705.c:190:13: warning: no previous prototype for 'sh7705_cache_init' [-Wmissing-prototypes]
Fix this by moving all cache-related forward declarations to
<asm/cacheflush.h>, and by including the latter where needed.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Link: https://lore.kernel.org/r/f47ab87636d16db4c47bebe1bf62650045f61989.1709579038.git.geert+renesas@glider.be
Signed-off-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
void cpu_cache_init(void);
+void __weak l2_cache_init(void);
+
+void __weak j2_cache_init(void);
+void __weak sh2_cache_init(void);
+void __weak sh2a_cache_init(void);
+void __weak sh3_cache_init(void);
+void __weak shx3_cache_init(void);
+void __weak sh4_cache_init(void);
+void __weak sh7705_cache_init(void);
+
+void __weak sh4__flush_region_init(void);
+
static inline void *sh_cacheop_vaddr(void *vaddr)
{
if (__in_29bit_mode())
#include <linux/sh_timer.h>
#include <linux/sh_intc.h>
#include <linux/io.h>
+
+#include <asm/cacheflush.h>
#include <asm/clock.h>
#include <asm/mmzone.h>
#include <asm/platform_early.h>
+
#include <cpu/sh7723.h>
/* Serial */
#include <linux/io.h>
#include <linux/notifier.h>
+#include <asm/cacheflush.h>
#include <asm/suspend.h>
#include <asm/clock.h>
#include <asm/mmzone.h>
} while (--way_count != 0);
}
-extern void __weak sh4__flush_region_init(void);
-
/*
* SH-4 has virtually indexed and physically tagged cache.
*/
#include <linux/kernel.h>
#include <linux/io.h>
#include <asm/cache.h>
+#include <asm/cacheflush.h>
#define CCR_CACHE_SNM 0x40000 /* Hardware-assisted synonym avoidance */
#define CCR_CACHE_IBE 0x1000000 /* ICBI broadcast */
goto skip;
if (boot_cpu_data.type == CPU_J2) {
- extern void __weak j2_cache_init(void);
-
j2_cache_init();
} else if (boot_cpu_data.family == CPU_FAMILY_SH2) {
- extern void __weak sh2_cache_init(void);
-
sh2_cache_init();
}
if (boot_cpu_data.family == CPU_FAMILY_SH2A) {
- extern void __weak sh2a_cache_init(void);
-
sh2a_cache_init();
}
if (boot_cpu_data.family == CPU_FAMILY_SH3) {
- extern void __weak sh3_cache_init(void);
-
sh3_cache_init();
if ((boot_cpu_data.type == CPU_SH7705) &&
(boot_cpu_data.dcache.sets == 512)) {
- extern void __weak sh7705_cache_init(void);
-
sh7705_cache_init();
}
}
if ((boot_cpu_data.family == CPU_FAMILY_SH4) ||
(boot_cpu_data.family == CPU_FAMILY_SH4A) ||
(boot_cpu_data.family == CPU_FAMILY_SH4AL_DSP)) {
- extern void __weak sh4_cache_init(void);
-
sh4_cache_init();
if ((boot_cpu_data.type == CPU_SH7786) ||
(boot_cpu_data.type == CPU_SHX3)) {
- extern void __weak shx3_cache_init(void);
-
shx3_cache_init();
}
}