]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
platform/x86: amd: pmf: Fix STT limits
authorMario Limonciello <mario.limonciello@amd.com>
Mon, 7 Apr 2025 18:18:21 +0000 (13:18 -0500)
committerIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
Fri, 11 Apr 2025 09:58:33 +0000 (12:58 +0300)
On some platforms it has been observed that STT limits are not being
applied properly causing poor performance as power limits are set too low.

STT limits that are sent to the platform are supposed to be in Q8.8
format.  Convert them before sending.

Reported-by: Yijun Shen <Yijun.Shen@dell.com>
Fixes: 7c45534afa443 ("platform/x86/amd/pmf: Add support for PMF Policy Binary")
Cc: stable@vger.kernel.org
Tested-by: Yijun Shen <Yijun_Shen@Dell.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Acked-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20250407181915.1482450-1-superm1@kernel.org
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
drivers/platform/x86/amd/pmf/auto-mode.c
drivers/platform/x86/amd/pmf/cnqf.c
drivers/platform/x86/amd/pmf/core.c
drivers/platform/x86/amd/pmf/pmf.h
drivers/platform/x86/amd/pmf/sps.c
drivers/platform/x86/amd/pmf/tee-if.c

index 02ff68be10d0124a77760fb726b9d2d604c97f3a..a184922bba8d6506514dca8c5d64e7a10ac4eddd 100644 (file)
@@ -120,9 +120,9 @@ static void amd_pmf_set_automode(struct amd_pmf_dev *dev, int idx,
        amd_pmf_send_cmd(dev, SET_SPPT_APU_ONLY, false, pwr_ctrl->sppt_apu_only, NULL);
        amd_pmf_send_cmd(dev, SET_STT_MIN_LIMIT, false, pwr_ctrl->stt_min, NULL);
        amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false,
-                        pwr_ctrl->stt_skin_temp[STT_TEMP_APU], NULL);
+                        fixp_q88_fromint(pwr_ctrl->stt_skin_temp[STT_TEMP_APU]), NULL);
        amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false,
-                        pwr_ctrl->stt_skin_temp[STT_TEMP_HS2], NULL);
+                        fixp_q88_fromint(pwr_ctrl->stt_skin_temp[STT_TEMP_HS2]), NULL);
 
        if (is_apmf_func_supported(dev, APMF_FUNC_SET_FAN_IDX))
                apmf_update_fan_idx(dev, config_store.mode_set[idx].fan_control.manual,
index bc8899e15c914b806df72c70fce65a38507ac7e7..207a0b33d8d368d5ac4c4b331b15a8bdacaceca3 100644 (file)
@@ -81,10 +81,10 @@ static int amd_pmf_set_cnqf(struct amd_pmf_dev *dev, int src, int idx,
        amd_pmf_send_cmd(dev, SET_SPPT, false, pc->sppt, NULL);
        amd_pmf_send_cmd(dev, SET_SPPT_APU_ONLY, false, pc->sppt_apu_only, NULL);
        amd_pmf_send_cmd(dev, SET_STT_MIN_LIMIT, false, pc->stt_min, NULL);
-       amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false, pc->stt_skin_temp[STT_TEMP_APU],
-                        NULL);
-       amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false, pc->stt_skin_temp[STT_TEMP_HS2],
-                        NULL);
+       amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false,
+                        fixp_q88_fromint(pc->stt_skin_temp[STT_TEMP_APU]), NULL);
+       amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false,
+                        fixp_q88_fromint(pc->stt_skin_temp[STT_TEMP_HS2]), NULL);
 
        if (is_apmf_func_supported(dev, APMF_FUNC_SET_FAN_IDX))
                apmf_update_fan_idx(dev,
index a2cb2d5544f5b394fa22087bec618b11bba3281e..96821101ec773cd8e182b2a75ee9cf38d63872ff 100644 (file)
@@ -176,6 +176,20 @@ static void __maybe_unused amd_pmf_dump_registers(struct amd_pmf_dev *dev)
        dev_dbg(dev->dev, "AMD_PMF_REGISTER_MESSAGE:%x\n", value);
 }
 
+/**
+ * fixp_q88_fromint: Convert integer to Q8.8
+ * @val: input value
+ *
+ * Converts an integer into binary fixed point format where 8 bits
+ * are used for integer and 8 bits are used for the decimal.
+ *
+ * Return: unsigned integer converted to Q8.8 format
+ */
+u32 fixp_q88_fromint(u32 val)
+{
+       return val << 8;
+}
+
 int amd_pmf_send_cmd(struct amd_pmf_dev *dev, u8 message, bool get, u32 arg, u32 *data)
 {
        int rc;
index e6bdee68ccf3477a703075f7c87d61ea94157f95..45b60238d5277f139b398dc331ae33c7ba8f6ece 100644 (file)
@@ -777,6 +777,7 @@ int apmf_install_handler(struct amd_pmf_dev *pmf_dev);
 int apmf_os_power_slider_update(struct amd_pmf_dev *dev, u8 flag);
 int amd_pmf_set_dram_addr(struct amd_pmf_dev *dev, bool alloc_buffer);
 int amd_pmf_notify_sbios_heartbeat_event_v2(struct amd_pmf_dev *dev, u8 flag);
+u32 fixp_q88_fromint(u32 val);
 
 /* SPS Layer */
 int amd_pmf_get_pprof_modes(struct amd_pmf_dev *pmf);
index d3083383f11fbf87a273c89a4c833a8e4d9a9941..49e14ca94a9e77a7088f82e68de22971f80a7042 100644 (file)
@@ -198,9 +198,11 @@ static void amd_pmf_update_slider_v2(struct amd_pmf_dev *dev, int idx)
        amd_pmf_send_cmd(dev, SET_STT_MIN_LIMIT, false,
                         apts_config_store.val[idx].stt_min_limit, NULL);
        amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false,
-                        apts_config_store.val[idx].stt_skin_temp_limit_apu, NULL);
+                        fixp_q88_fromint(apts_config_store.val[idx].stt_skin_temp_limit_apu),
+                        NULL);
        amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false,
-                        apts_config_store.val[idx].stt_skin_temp_limit_hs2, NULL);
+                        fixp_q88_fromint(apts_config_store.val[idx].stt_skin_temp_limit_hs2),
+                        NULL);
 }
 
 void amd_pmf_update_slider(struct amd_pmf_dev *dev, bool op, int idx,
@@ -217,9 +219,11 @@ void amd_pmf_update_slider(struct amd_pmf_dev *dev, bool op, int idx,
                amd_pmf_send_cmd(dev, SET_STT_MIN_LIMIT, false,
                                 config_store.prop[src][idx].stt_min, NULL);
                amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false,
-                                config_store.prop[src][idx].stt_skin_temp[STT_TEMP_APU], NULL);
+                                fixp_q88_fromint(config_store.prop[src][idx].stt_skin_temp[STT_TEMP_APU]),
+                                NULL);
                amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false,
-                                config_store.prop[src][idx].stt_skin_temp[STT_TEMP_HS2], NULL);
+                                fixp_q88_fromint(config_store.prop[src][idx].stt_skin_temp[STT_TEMP_HS2]),
+                                NULL);
        } else if (op == SLIDER_OP_GET) {
                amd_pmf_send_cmd(dev, GET_SPL, true, ARG_NONE, &table->prop[src][idx].spl);
                amd_pmf_send_cmd(dev, GET_FPPT, true, ARG_NONE, &table->prop[src][idx].fppt);
index a1e43873a07b083b0adb42814eeff87d55450636..14b99d8b63d2fc8e5a0d2520c82ceaf2f27ff7ff 100644 (file)
@@ -123,7 +123,8 @@ static void amd_pmf_apply_policies(struct amd_pmf_dev *dev, struct ta_pmf_enact_
 
                case PMF_POLICY_STT_SKINTEMP_APU:
                        if (dev->prev_data->stt_skintemp_apu != val) {
-                               amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false, val, NULL);
+                               amd_pmf_send_cmd(dev, SET_STT_LIMIT_APU, false,
+                                                fixp_q88_fromint(val), NULL);
                                dev_dbg(dev->dev, "update STT_SKINTEMP_APU: %u\n", val);
                                dev->prev_data->stt_skintemp_apu = val;
                        }
@@ -131,7 +132,8 @@ static void amd_pmf_apply_policies(struct amd_pmf_dev *dev, struct ta_pmf_enact_
 
                case PMF_POLICY_STT_SKINTEMP_HS2:
                        if (dev->prev_data->stt_skintemp_hs2 != val) {
-                               amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false, val, NULL);
+                               amd_pmf_send_cmd(dev, SET_STT_LIMIT_HS2, false,
+                                                fixp_q88_fromint(val), NULL);
                                dev_dbg(dev->dev, "update STT_SKINTEMP_HS2: %u\n", val);
                                dev->prev_data->stt_skintemp_hs2 = val;
                        }