testsuite/arm: Add arm_softfp_ok or arm_hard_ok as needed.

Several tests override the -mfloat-abi option detected by their
effective targets. Make sure it is supported, so that these tests are
unsupported rather than failures (the inclusion of arm_neon.h
otherwise fails for lack of gnu/stubs-*.h)

This avoids failures with
bfloat16_simd_2_1.c
bfloat16_simd_3_1.c
bf16_vldn_1.c
bf16_vstn_1.c on arm-linux-gnueabi
and
pr51968.c
bfloat16_simd_1_2.c
bfloat16_simd_2_2.c
bfloat16_simd_3_2.c on arm-linux-gnueabihf.

On arm-eabi with default cpu/fpu/mode and a+rm multilibs,
bfloat16_simd_2_1.c, bfloat16_simd_3_1.c, bf16_vstn_1.c and
bf16_vldn_1.c become unsupported instead of pass because arm_hard_ok
fails with "selected processor lacks an FPU". Since we also override
the fpu in dg-additional-options, we'd need another effective target
(say arm_hard_neon_ok) that would check -mfloat-abi=hard -mfpu=neon at
the same time. But we have already so many arm effective targets, it
doesn't seem like a good way forward.

2021-03-19  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/testsuite/
	* gcc.target/arm/bfloat16_simd_1_2.c: Add arm_softfp_ok.
	* gcc.target/arm/bfloat16_simd_2_2.c: Likewise.
	* gcc.target/arm/bfloat16_simd_3_2.c: Likewise.
	* gcc.target/arm/pr51968.c: Likewise.
	* gcc.target/arm/bfloat16_simd_2_1.c: arm_hard_ok.
	* gcc.target/arm/bfloat16_simd_3_1.c: Likewise.
	* gcc.target/arm/simd/bf16_vldn_1.c: Likewise.
	* gcc.target/arm/simd/bf16_vstn_1.c: Likewise.

diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c
index 4ffcc54de5e3a0519338a2d42a13b18c3a8f39b1..95eecec2d0973edc803edd41762f1ea48094f10a 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c
+++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_1_2.c
@@ -1,4 +1,5 @@
 /* { dg-do assemble { target { arm*-*-* } } } */
+/* { dg-require-effective-target arm_softfp_ok } */
 /* { dg-require-effective-target arm_v8_neon_ok } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
 /* { dg-additional-options "-march=armv8.2-a+bf16 -mfloat-abi=softfp -mfpu=auto" } */

diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c
index 05ee4d878ec091e16f6ae4ed5bdf8ad117dab772..02b4c416df6877818055da4d59a1cdf1ac4a362c 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c
+++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_1.c
@@ -1,4 +1,5 @@
 /* { dg-do assemble { target { arm*-*-* } } } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-require-effective-target arm_v8_neon_ok } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
 /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=hard -mfpu=neon-fp-armv8" } */

diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c
index 15fba316d356c6da1f0667bd8115193df4e38ada..175bfa5c22738dc38382888089385ad53bc4e5c3 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c
+++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_2_2.c
@@ -1,4 +1,5 @@
 /* { dg-do assemble { target { arm*-*-* } } } */
+/* { dg-require-effective-target arm_softfp_ok } */
 /* { dg-require-effective-target arm_v8_neon_ok } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
 /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=softfp -mfpu=neon-fp-armv8" } */

diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c
index b9b7606d0352307b2b741a84bd8d901cf2437007..d2326c2daf5a8fc4b7fb66d58e419abb8379a0cc 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c
+++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_1.c
@@ -1,4 +1,5 @@
 /* { dg-do assemble { target { arm*-*-* } } } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-require-effective-target arm_v8_neon_ok } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
 /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=hard -mfpu=neon-fp-armv8" } */

diff --git a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c
index ab1fe101af4ab3ad68dba9848b7d5b875ebf426c..346253b8a47dcd322f74d6bb6b63b45c64acd2ca 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c
+++ b/gcc/testsuite/gcc.target/arm/bfloat16_simd_3_2.c
@@ -1,4 +1,5 @@
 /* { dg-do assemble { target { arm*-*-* } } } */
+/* { dg-require-effective-target arm_softfp_ok } */
 /* { dg-require-effective-target arm_v8_neon_ok } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
 /* { dg-additional-options "-march=armv8.2-a -mfloat-abi=softfp -mfpu=neon-fp-armv8" } */

diff --git a/gcc/testsuite/gcc.target/arm/pr51968.c b/gcc/testsuite/gcc.target/arm/pr51968.c
index 781470223db0d85214bced0b64fda68b4c43967f..c06da486316dfb0d3fc994fc9099a0623a7974ff 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/pr51968.c
+++ b/gcc/testsuite/gcc.target/arm/pr51968.c
@@ -1,7 +1,8 @@
 /* PR target/51968 */
 /* { dg-do compile } */
-/* { dg-options "-O2 -march=armv7-a -mfloat-abi=softfp -mfpu=neon" } */
+/* { dg-require-effective-target arm_softfp_ok } */
 /* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O2 -march=armv7-a -mfloat-abi=softfp -mfpu=neon" } */
 #include <arm_neon.h>
 
 struct T { int8x8x2_t val; };

diff --git a/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c b/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c
index 663e76984c3b1384e341ef747ba2013099290917..4d916149ac38f57f194e8ca796e02b87a5e1edf4 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/bf16_vldn_1.c
@@ -1,4 +1,5 @@
 /* { dg-do assemble } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
 /* { dg-add-options arm_v8_2a_bf16_neon } */
 /* { dg-additional-options "-save-temps -O2 -mfloat-abi=hard" }  */

diff --git a/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c b/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c
index 2657b6f7cc4f3b5b7089a962933931b16686083a..5c6cdd5e43e5079f2e09fd8e53b9bc8173fdb71b 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c
@@ -1,4 +1,5 @@
 /* { dg-do assemble } */
+/* { dg-require-effective-target arm_hard_ok } */
 /* { dg-require-effective-target arm_v8_2a_bf16_neon_ok } */
 /* { dg-add-options arm_v8_2a_bf16_neon } */
 /* { dg-additional-options "-save-temps -O2 -mfloat-abi=hard" }  */