--- /dev/null
+From 1d9d8639c063caf6efc2447f5f26aa637f844ff6 Mon Sep 17 00:00:00 2001
+From: Stephane Eranian <eranian@google.com>
+Date: Fri, 15 Mar 2013 14:26:07 +0100
+Subject: perf,x86: fix kernel crash with PEBS/BTS after suspend/resume
+
+From: Stephane Eranian <eranian@google.com>
+
+commit 1d9d8639c063caf6efc2447f5f26aa637f844ff6 upstream.
+
+This patch fixes a kernel crash when using precise sampling (PEBS)
+after a suspend/resume. Turns out the CPU notifier code is not invoked
+on CPU0 (BP). Therefore, the DS_AREA (used by PEBS) is not restored properly
+by the kernel and keeps it power-on/resume value of 0 causing any PEBS
+measurement to crash when running on CPU0.
+
+The workaround is to add a hook in the actual resume code to restore
+the DS Area MSR value. It is invoked for all CPUS. So for all but CPU0,
+the DS_AREA will be restored twice but this is harmless.
+
+Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Stephane Eranian <eranian@google.com>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Shuah Khan <shuah.khan@hp.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/kernel/cpu/perf_event_intel_ds.c | 8 ++++++++
+ arch/x86/power/cpu.c | 2 ++
+ include/linux/perf_event.h | 2 ++
+ 3 files changed, 12 insertions(+)
+
+--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
++++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
+@@ -754,6 +754,14 @@ static void intel_ds_init(void)
+ }
+ }
+
++void perf_restore_debug_store(void)
++{
++ if (!x86_pmu.bts && !x86_pmu.pebs)
++ return;
++
++ init_debug_store_on_cpu(smp_processor_id());
++}
++
+ #else /* CONFIG_CPU_SUP_INTEL */
+
+ static void reserve_ds_buffers(void)
+--- a/arch/x86/power/cpu.c
++++ b/arch/x86/power/cpu.c
+@@ -10,6 +10,7 @@
+
+ #include <linux/suspend.h>
+ #include <linux/smp.h>
++#include <linux/perf_event.h>
+
+ #include <asm/pgtable.h>
+ #include <asm/proto.h>
+@@ -224,6 +225,7 @@ static void __restore_processor_state(st
+
+ do_fpu_end();
+ mtrr_bp_restore();
++ perf_restore_debug_store();
+ }
+
+ /* Needed by apm.c */
+--- a/include/linux/perf_event.h
++++ b/include/linux/perf_event.h
+@@ -1153,6 +1153,7 @@ extern void perf_swevent_put_recursion_c
+ extern void perf_event_enable(struct perf_event *event);
+ extern void perf_event_disable(struct perf_event *event);
+ extern void perf_event_task_tick(void);
++extern void perf_restore_debug_store(void);
+ #else
+ static inline void
+ perf_event_task_sched_in(struct task_struct *task) { }
+@@ -1187,6 +1188,7 @@ static inline void perf_swevent_put_recu
+ static inline void perf_event_enable(struct perf_event *event) { }
+ static inline void perf_event_disable(struct perf_event *event) { }
+ static inline void perf_event_task_tick(void) { }
++static inline void perf_restore_debug_store(void) { }
+ #endif
+
+ #define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x))
--- /dev/null
+From 6c4d3bc99b3341067775efd4d9d13cc8e655fd7c Mon Sep 17 00:00:00 2001
+From: David Rientjes <rientjes@google.com>
+Date: Sun, 17 Mar 2013 15:49:10 -0700
+Subject: perf,x86: fix link failure for non-Intel configs
+
+From: David Rientjes <rientjes@google.com>
+
+commit 6c4d3bc99b3341067775efd4d9d13cc8e655fd7c upstream.
+
+Commit 1d9d8639c063 ("perf,x86: fix kernel crash with PEBS/BTS after
+suspend/resume") introduces a link failure since
+perf_restore_debug_store() is only defined for CONFIG_CPU_SUP_INTEL:
+
+ arch/x86/power/built-in.o: In function `restore_processor_state':
+ (.text+0x45c): undefined reference to `perf_restore_debug_store'
+
+Fix it by defining the dummy function appropriately.
+
+Signed-off-by: David Rientjes <rientjes@google.com>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ include/linux/perf_event.h | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+--- a/include/linux/perf_event.h
++++ b/include/linux/perf_event.h
+@@ -1153,7 +1153,6 @@ extern void perf_swevent_put_recursion_c
+ extern void perf_event_enable(struct perf_event *event);
+ extern void perf_event_disable(struct perf_event *event);
+ extern void perf_event_task_tick(void);
+-extern void perf_restore_debug_store(void);
+ #else
+ static inline void
+ perf_event_task_sched_in(struct task_struct *task) { }
+@@ -1188,6 +1187,11 @@ static inline void perf_swevent_put_recu
+ static inline void perf_event_enable(struct perf_event *event) { }
+ static inline void perf_event_disable(struct perf_event *event) { }
+ static inline void perf_event_task_tick(void) { }
++#endif
++
++#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL)
++extern void perf_restore_debug_store(void);
++#else
+ static inline void perf_restore_debug_store(void) { }
+ #endif
+
--- /dev/null
+From 2a6e06b2aed6995af401dcd4feb5e79a0c7ea554 Mon Sep 17 00:00:00 2001
+From: Linus Torvalds <torvalds@linux-foundation.org>
+Date: Sun, 17 Mar 2013 15:44:43 -0700
+Subject: perf,x86: fix wrmsr_on_cpu() warning on suspend/resume
+
+From: Linus Torvalds <torvalds@linux-foundation.org>
+
+commit 2a6e06b2aed6995af401dcd4feb5e79a0c7ea554 upstream.
+
+Commit 1d9d8639c063 ("perf,x86: fix kernel crash with PEBS/BTS after
+suspend/resume") fixed a crash when doing PEBS performance profiling
+after resuming, but in using init_debug_store_on_cpu() to restore the
+DS_AREA mtrr it also resulted in a new WARN_ON() triggering.
+
+init_debug_store_on_cpu() uses "wrmsr_on_cpu()", which in turn uses CPU
+cross-calls to do the MSR update. Which is not really valid at the
+early resume stage, and the warning is quite reasonable. Now, it all
+happens to _work_, for the simple reason that smp_call_function_single()
+ends up just doing the call directly on the CPU when the CPU number
+matches, but we really should just do the wrmsr() directly instead.
+
+This duplicates the wrmsr() logic, but hopefully we can just remove the
+wrmsr_on_cpu() version eventually.
+
+Reported-and-tested-by: Parag Warudkar <parag.lkml@gmail.com>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/kernel/cpu/perf_event_intel_ds.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
++++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
+@@ -756,10 +756,12 @@ static void intel_ds_init(void)
+
+ void perf_restore_debug_store(void)
+ {
++ struct debug_store *ds = __this_cpu_read(cpu_hw_events.ds);
++
+ if (!x86_pmu.bts && !x86_pmu.pebs)
+ return;
+
+- init_debug_store_on_cpu(smp_processor_id());
++ wrmsrl(MSR_IA32_DS_AREA, (unsigned long)ds);
+ }
+
+ #else /* CONFIG_CPU_SUP_INTEL */
--- /dev/null
+From d63ac5f6cf31c8a83170a9509b350c1489a7262b Mon Sep 17 00:00:00 2001
+From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+Date: Wed, 13 Mar 2013 09:55:02 +1100
+Subject: powerpc: Fix cputable entry for 970MP rev 1.0
+
+From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+
+commit d63ac5f6cf31c8a83170a9509b350c1489a7262b upstream.
+
+Commit 44ae3ab3358e962039c36ad4ae461ae9fb29596c forgot to update
+the entry for the 970MP rev 1.0 processor when moving some CPU
+features bits to the MMU feature bit mask. This breaks booting
+on some rare G5 models using that chip revision.
+
+Reported-by: Phileas Fogg <phileas-fogg@mail.ru>
+Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/powerpc/kernel/cputable.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/powerpc/kernel/cputable.c
++++ b/arch/powerpc/kernel/cputable.c
+@@ -268,7 +268,7 @@ static struct cpu_spec __initdata cpu_sp
+ .cpu_features = CPU_FTRS_PPC970,
+ .cpu_user_features = COMMON_USER_POWER4 |
+ PPC_FEATURE_HAS_ALTIVEC_COMP,
+- .mmu_features = MMU_FTR_HPTE_TABLE,
++ .mmu_features = MMU_FTRS_PPC970,
+ .icache_bsize = 128,
+ .dcache_bsize = 128,
+ .num_pmcs = 8,
--- /dev/null
+From 4502403dcf8f5c76abd4dbab8726c8e4ecb5cd34 Mon Sep 17 00:00:00 2001
+From: Dan Carpenter <dan.carpenter@oracle.com>
+Date: Sat, 16 Mar 2013 12:48:11 +0300
+Subject: selinux: use GFP_ATOMIC under spin_lock
+
+From: Dan Carpenter <dan.carpenter@oracle.com>
+
+commit 4502403dcf8f5c76abd4dbab8726c8e4ecb5cd34 upstream.
+
+The call tree here is:
+
+sk_clone_lock() <- takes bh_lock_sock(newsk);
+xfrm_sk_clone_policy()
+__xfrm_sk_clone_policy()
+clone_policy() <- uses GFP_ATOMIC for allocations
+security_xfrm_policy_clone()
+security_ops->xfrm_policy_clone_security()
+selinux_xfrm_policy_clone()
+
+Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
+Signed-off-by: James Morris <james.l.morris@oracle.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ security/selinux/xfrm.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/security/selinux/xfrm.c
++++ b/security/selinux/xfrm.c
+@@ -310,7 +310,7 @@ int selinux_xfrm_policy_clone(struct xfr
+
+ if (old_ctx) {
+ new_ctx = kmalloc(sizeof(*old_ctx) + old_ctx->ctx_len,
+- GFP_KERNEL);
++ GFP_ATOMIC);
+ if (!new_ctx)
+ return -ENOMEM;
+
alsa-seq-fix-missing-error-handling-in-snd_seq_timer_open.patch
hwmon-lineage-pem-add-missing-terminating-entry-for-pem__attributes.patch
w1-fix-oops-when-w1_search-is-called-from-netlink-connector.patch
+powerpc-fix-cputable-entry-for-970mp-rev-1.0.patch
+selinux-use-gfp_atomic-under-spin_lock.patch
+perf-x86-fix-kernel-crash-with-pebs-bts-after-suspend-resume.patch
+perf-x86-fix-wrmsr_on_cpu-warning-on-suspend-resume.patch
+perf-x86-fix-link-failure-for-non-intel-configs.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
