--- /dev/null
+From cfa50cd04c7b9ed9134f903e850a895202ce0e28 Mon Sep 17 00:00:00 2001
+From: Linus Torvalds <torvalds@linux-foundation.org>
+Date: Sat, 7 Sep 2019 14:25:54 -0700
+Subject: Revert "x86/apic: Include the LDR when clearing out APIC registers"
+
+[ Upstream commit 950b07c14e8c59444e2359f15fd70ed5112e11a0 ]
+
+This reverts commit 558682b5291937a70748d36fd9ba757fb25b99ae.
+
+Chris Wilson reports that it breaks his CPU hotplug test scripts. In
+particular, it breaks offlining and then re-onlining the boot CPU, which
+we treat specially (and the BIOS does too).
+
+The symptoms are that we can offline the CPU, but it then does not come
+back online again:
+
+ smpboot: CPU 0 is now offline
+ smpboot: Booting Node 0 Processor 0 APIC 0x0
+ smpboot: do_boot_cpu failed(-1) to wakeup CPU#0
+
+Thomas says he knows why it's broken (my personal suspicion: our magic
+handling of the "cpu0_logical_apicid" thing), but for 5.3 the right fix
+is to just revert it, since we've never touched the LDR bits before, and
+it's not worth the risk to do anything else at this stage.
+
+[ Hotpluging of the boot CPU is special anyway, and should be off by
+ default. See the "BOOTPARAM_HOTPLUG_CPU0" config option and the
+ cpu0_hotplug kernel parameter.
+
+ In general you should not do it, and it has various known limitations
+ (hibernate and suspend require the boot CPU, for example).
+
+ But it should work, even if the boot CPU is special and needs careful
+ treatment - Linus ]
+
+Link: https://lore.kernel.org/lkml/156785100521.13300.14461504732265570003@skylake-alporthouse-com/
+Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
+Acked-by: Thomas Gleixner <tglx@linutronix.de>
+Cc: Bandan Das <bsd@redhat.com>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/x86/kernel/apic/apic.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
+index 8199b7e4aff94..f8f9cfded97d3 100644
+--- a/arch/x86/kernel/apic/apic.c
++++ b/arch/x86/kernel/apic/apic.c
+@@ -1148,10 +1148,6 @@ void clear_local_APIC(void)
+ apic_write(APIC_LVT0, v | APIC_LVT_MASKED);
+ v = apic_read(APIC_LVT1);
+ apic_write(APIC_LVT1, v | APIC_LVT_MASKED);
+- if (!x2apic_enabled()) {
+- v = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
+- apic_write(APIC_LDR, v);
+- }
+ if (maxlvt >= 4) {
+ v = apic_read(APIC_LVTPC);
+ apic_write(APIC_LVTPC, v | APIC_LVT_MASKED);
+--
+2.20.1
+