-mamd64 -mintel64

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 254548f21014ba27e22f9f78495cd6eb2dabecf3..569c81fdff125358428527bfd3395fa8f582d07b 100644 (file)
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -9550,6 +9550,8 @@ const char *md_shortopts = "qn";
 #define OPTION_OMIT_LOCK_PREFIX (OPTION_MD_BASE + 19)
 #define OPTION_MEVEXRCIG (OPTION_MD_BASE + 20)
 #define OPTION_MSHARED (OPTION_MD_BASE + 21)
+#define OPTION_MAMD64 (OPTION_MD_BASE + 22)
+#define OPTION_MINTEL64 (OPTION_MD_BASE + 23)
 
 struct option md_longopts[] =
 {
@@ -9582,6 +9584,8 @@ struct option md_longopts[] =
 #endif
   {"momit-lock-prefix", required_argument, NULL, OPTION_OMIT_LOCK_PREFIX},
   {"mevexrcig", required_argument, NULL, OPTION_MEVEXRCIG},
+  {"mamd64", no_argument, NULL, OPTION_MAMD64},
+  {"mintel64", no_argument, NULL, OPTION_MINTEL64},
   {NULL, no_argument, NULL, 0}
 };
 size_t md_longopts_size = sizeof (md_longopts);
@@ -9898,6 +9902,20 @@ md_parse_option (int c, char *arg)
         as_fatal (_("invalid -momit-lock-prefix= option: `%s'"), arg);
       break;
 
+    case OPTION_MAMD64:
+      cpu_arch_flags.bitfield.cpuamd64 = 1;
+      cpu_arch_flags.bitfield.cpuintel64 = 0;
+      cpu_arch_isa_flags.bitfield.cpuamd64 = 1;
+      cpu_arch_isa_flags.bitfield.cpuintel64 = 0;
+      break;
+
+    case OPTION_MINTEL64:
+      cpu_arch_flags.bitfield.cpuamd64 = 0;
+      cpu_arch_flags.bitfield.cpuintel64 = 1;
+      cpu_arch_isa_flags.bitfield.cpuamd64 = 0;
+      cpu_arch_isa_flags.bitfield.cpuintel64 = 1;
+      break;
+
     default:
       return 0;
     }

diff --git a/gas/testsuite/gas/i386/x86-64-branch.d b/gas/testsuite/gas/i386/x86-64-branch.d
index 49e17a40dff621b72ff50f08cf75fbd69e06dd29..9252ebd5d6425afcbc2bd9813604dcf16ce1126f 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-branch.d
+++ b/gas/testsuite/gas/i386/x86-64-branch.d
@@ -1,5 +1,5 @@
 #as: -J
-#objdump: -dw
+#objdump: -dw -MIntel64
 #name: x86-64 branch
 
 .*: +file format .*

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 978a94805dfb71bf6c62ff224fd56a970fe93a79..35cb1fe33762d53d72bbca39165d191be6756314 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -12346,11 +12346,11 @@ static char scale_char;
 
 enum x86_64_isa
 {
-  amd64,
+  amd64 = 0,
   intel64
 };
 
-static enum x86_64_isa isa64 = amd64;
+static enum x86_64_isa isa64;
 
 /* Here for backwards compatibility.  When gdb stops using
    print_insn_i386_att and print_insn_i386_intel these functions can
@@ -12401,8 +12401,8 @@ with the -M switch (multiple options should be separated by commas):\n"));
   fprintf (stream, _("  data32      Assume 32bit data size\n"));
   fprintf (stream, _("  data16      Assume 16bit data size\n"));
   fprintf (stream, _("  suffix      Always display instruction suffix in AT&T syntax\n"));
-  fprintf (stream, _("  AMD64       Display instruction in AMD64 ISA\n"));
-  fprintf (stream, _("  Intel64     Display instruction in Intel64 ISA\n"));
+  fprintf (stream, _("  amd64       Display instruction in AMD64 ISA\n"));
+  fprintf (stream, _("  intel64     Display instruction in Intel64 ISA\n"));
 }
 
 /* Bad opcode.  */
@@ -12886,9 +12886,9 @@ print_insn (bfd_vma pc, disassemble_info *info)
 
   for (p = info->disassembler_options; p != NULL; )
     {
-      if (!strncasecmp (p, "amd64", sizeof "amd64"))
+      if (CONST_STRNEQ (p, "amd64"))
        isa64 = amd64;
-      else if (!strncasecmp (p, "intel64", sizeof "intel64"))
+      else if (CONST_STRNEQ (p, "intel64"))
        isa64 = intel64;
       else if (CONST_STRNEQ (p, "x86-64"))
        {