--- /dev/null
+From ff0cf0ab9073727a67f9902dba77a758654ae895 Mon Sep 17 00:00:00 2001
+From: Praveenkumar I <quic_ipkumar@quicinc.com>
+Date: Mon, 10 Feb 2025 17:34:32 +0530
+Subject: [PATCH] thermal/drivers/tsens: Add TSENS enable and calibration
+ support for V2
+
+SoCs without RPM need to enable sensors and calibrate them from the kernel.
+The IPQ5332 and IPQ5424 use the tsens v2.3.3 IP and do not have RPM.
+Therefore, add a new calibration function for V2, as the tsens.c calib
+function only supports V1. Also add new feature_config, ops and data for
+IPQ5332, IPQ5424.
+
+Although the TSENS IP supports 16 sensors, not all are used. The hw_id
+is used to enable the relevant sensors.
+
+Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
+Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
+Link: https://lore.kernel.org/r/20250210120436.821684-3-quic_mmanikan@quicinc.com
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+---
+ drivers/thermal/qcom/tsens-v2.c | 178 ++++++++++++++++++++++++++++++++
+ drivers/thermal/qcom/tsens.c | 8 +-
+ drivers/thermal/qcom/tsens.h | 3 +
+ 3 files changed, 188 insertions(+), 1 deletion(-)
+
+--- a/drivers/thermal/qcom/tsens-v2.c
++++ b/drivers/thermal/qcom/tsens-v2.c
+@@ -4,13 +4,32 @@
+ * Copyright (c) 2018, Linaro Limited
+ */
+
++#include <linux/bitfield.h>
+ #include <linux/bitops.h>
++#include <linux/nvmem-consumer.h>
+ #include <linux/regmap.h>
+ #include "tsens.h"
+
+ /* ----- SROT ------ */
+ #define SROT_HW_VER_OFF 0x0000
+ #define SROT_CTRL_OFF 0x0004
++#define SROT_MEASURE_PERIOD 0x0008
++#define SROT_Sn_CONVERSION 0x0060
++#define V2_SHIFT_DEFAULT 0x0003
++#define V2_SLOPE_DEFAULT 0x0cd0
++#define V2_CZERO_DEFAULT 0x016a
++#define ONE_PT_SLOPE 0x0cd0
++#define TWO_PT_SHIFTED_GAIN 921600
++#define ONE_PT_CZERO_CONST 94
++#define SW_RST_DEASSERT 0x0
++#define SW_RST_ASSERT 0x1
++#define MEASURE_PERIOD_2mSEC 0x1
++#define RESULT_FORMAT_TEMP 0x1
++#define TSENS_ENABLE 0x1
++#define SENSOR_CONVERSION(n) (((n) * 4) + SROT_Sn_CONVERSION)
++#define CONVERSION_SHIFT_MASK GENMASK(24, 23)
++#define CONVERSION_SLOPE_MASK GENMASK(22, 10)
++#define CONVERSION_CZERO_MASK GENMASK(9, 0)
+
+ /* ----- TM ------ */
+ #define TM_INT_EN_OFF 0x0004
+@@ -50,6 +69,17 @@ static struct tsens_features ipq8074_fea
+ .trip_max_temp = 204000,
+ };
+
++static struct tsens_features ipq5332_feat = {
++ .ver_major = VER_2_X_NO_RPM,
++ .crit_int = 1,
++ .combo_int = 1,
++ .adc = 0,
++ .srot_split = 1,
++ .max_sensors = 16,
++ .trip_min_temp = 0,
++ .trip_max_temp = 204000,
++};
++
+ static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
+ /* ----- SROT ------ */
+ /* VERSION */
+@@ -59,6 +89,10 @@ static const struct reg_field tsens_v2_r
+ /* CTRL_OFF */
+ [TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0),
+ [TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1),
++ [SENSOR_EN] = REG_FIELD(SROT_CTRL_OFF, 3, 18),
++ [CODE_OR_TEMP] = REG_FIELD(SROT_CTRL_OFF, 21, 21),
++
++ [MAIN_MEASURE_PERIOD] = REG_FIELD(SROT_MEASURE_PERIOD, 0, 7),
+
+ /* ----- TM ------ */
+ /* INTERRUPT ENABLE */
+@@ -104,6 +138,128 @@ static const struct reg_field tsens_v2_r
+ [TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0),
+ };
+
++static int tsens_v2_calibrate_sensor(struct device *dev, struct tsens_sensor *sensor,
++ struct regmap *map, u32 mode, u32 base0, u32 base1)
++{
++ u32 shift = V2_SHIFT_DEFAULT;
++ u32 slope = V2_SLOPE_DEFAULT;
++ u32 czero = V2_CZERO_DEFAULT;
++ char name[20];
++ u32 val;
++ int ret;
++
++ /* Read offset value */
++ ret = snprintf(name, sizeof(name), "tsens_sens%d_off", sensor->hw_id);
++ if (ret < 0)
++ return ret;
++
++ ret = nvmem_cell_read_variable_le_u32(dev, name, &sensor->offset);
++ if (ret)
++ return ret;
++
++ /* Based on calib mode, program SHIFT, SLOPE and CZERO */
++ switch (mode) {
++ case TWO_PT_CALIB:
++ slope = (TWO_PT_SHIFTED_GAIN / (base1 - base0));
++
++ czero = (base0 + sensor->offset - ((base1 - base0) / 3));
++
++ break;
++ case ONE_PT_CALIB2:
++ czero = base0 + sensor->offset - ONE_PT_CZERO_CONST;
++
++ slope = ONE_PT_SLOPE;
++
++ break;
++ default:
++ dev_dbg(dev, "calibrationless mode\n");
++ }
++
++ val = FIELD_PREP(CONVERSION_SHIFT_MASK, shift) |
++ FIELD_PREP(CONVERSION_SLOPE_MASK, slope) |
++ FIELD_PREP(CONVERSION_CZERO_MASK, czero);
++
++ regmap_write(map, SENSOR_CONVERSION(sensor->hw_id), val);
++
++ return 0;
++}
++
++static int tsens_v2_calibration(struct tsens_priv *priv)
++{
++ struct device *dev = priv->dev;
++ u32 mode, base0, base1;
++ int i, ret;
++
++ if (priv->num_sensors > MAX_SENSORS)
++ return -EINVAL;
++
++ ret = nvmem_cell_read_variable_le_u32(priv->dev, "mode", &mode);
++ if (ret == -ENOENT)
++ dev_warn(priv->dev, "Calibration data not present in DT\n");
++ if (ret < 0)
++ return ret;
++
++ dev_dbg(priv->dev, "calibration mode is %d\n", mode);
++
++ ret = nvmem_cell_read_variable_le_u32(priv->dev, "base0", &base0);
++ if (ret < 0)
++ return ret;
++
++ ret = nvmem_cell_read_variable_le_u32(priv->dev, "base1", &base1);
++ if (ret < 0)
++ return ret;
++
++ /* Calibrate each sensor */
++ for (i = 0; i < priv->num_sensors; i++) {
++ ret = tsens_v2_calibrate_sensor(dev, &priv->sensor[i], priv->srot_map,
++ mode, base0, base1);
++ if (ret < 0)
++ return ret;
++ }
++
++ return 0;
++}
++
++static int __init init_tsens_v2_no_rpm(struct tsens_priv *priv)
++{
++ struct device *dev = priv->dev;
++ int i, ret;
++ u32 val = 0;
++
++ ret = init_common(priv);
++ if (ret < 0)
++ return ret;
++
++ priv->rf[CODE_OR_TEMP] = devm_regmap_field_alloc(dev, priv->srot_map,
++ priv->fields[CODE_OR_TEMP]);
++ if (IS_ERR(priv->rf[CODE_OR_TEMP]))
++ return PTR_ERR(priv->rf[CODE_OR_TEMP]);
++
++ priv->rf[MAIN_MEASURE_PERIOD] = devm_regmap_field_alloc(dev, priv->srot_map,
++ priv->fields[MAIN_MEASURE_PERIOD]);
++ if (IS_ERR(priv->rf[MAIN_MEASURE_PERIOD]))
++ return PTR_ERR(priv->rf[MAIN_MEASURE_PERIOD]);
++
++ regmap_field_write(priv->rf[TSENS_SW_RST], SW_RST_ASSERT);
++
++ regmap_field_write(priv->rf[MAIN_MEASURE_PERIOD], MEASURE_PERIOD_2mSEC);
++
++ /* Enable available sensors */
++ for (i = 0; i < priv->num_sensors; i++)
++ val |= 1 << priv->sensor[i].hw_id;
++
++ regmap_field_write(priv->rf[SENSOR_EN], val);
++
++ /* Select temperature format, unit is deci-Celsius */
++ regmap_field_write(priv->rf[CODE_OR_TEMP], RESULT_FORMAT_TEMP);
++
++ regmap_field_write(priv->rf[TSENS_SW_RST], SW_RST_DEASSERT);
++
++ regmap_field_write(priv->rf[TSENS_EN], TSENS_ENABLE);
++
++ return 0;
++}
++
+ static const struct tsens_ops ops_generic_v2 = {
+ .init = init_common,
+ .get_temp = get_temp_tsens_valid,
+@@ -122,6 +278,28 @@ struct tsens_plat_data data_ipq8074 = {
+ .fields = tsens_v2_regfields,
+ };
+
++static const struct tsens_ops ops_ipq5332 = {
++ .init = init_tsens_v2_no_rpm,
++ .get_temp = get_temp_tsens_valid,
++ .calibrate = tsens_v2_calibration,
++};
++
++const struct tsens_plat_data data_ipq5332 = {
++ .num_sensors = 5,
++ .ops = &ops_ipq5332,
++ .hw_ids = (unsigned int []){11, 12, 13, 14, 15},
++ .feat = &ipq5332_feat,
++ .fields = tsens_v2_regfields,
++};
++
++const struct tsens_plat_data data_ipq5424 = {
++ .num_sensors = 7,
++ .ops = &ops_ipq5332,
++ .hw_ids = (unsigned int []){9, 10, 11, 12, 13, 14, 15},
++ .feat = &ipq5332_feat,
++ .fields = tsens_v2_regfields,
++};
++
+ /* Kept around for backward compatibility with old msm8996.dtsi */
+ struct tsens_plat_data data_8996 = {
+ .num_sensors = 13,
+--- a/drivers/thermal/qcom/tsens.c
++++ b/drivers/thermal/qcom/tsens.c
+@@ -975,7 +975,7 @@ int __init init_common(struct tsens_priv
+ ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
+ if (ret)
+ goto err_put_device;
+- if (!enabled) {
++ if (!enabled && (tsens_version(priv) != VER_2_X_NO_RPM)) {
+ dev_err(dev, "%s: device not enabled\n", __func__);
+ ret = -ENODEV;
+ goto err_put_device;
+@@ -1102,6 +1102,12 @@ static SIMPLE_DEV_PM_OPS(tsens_pm_ops, t
+
+ static const struct of_device_id tsens_table[] = {
+ {
++ .compatible = "qcom,ipq5332-tsens",
++ .data = &data_ipq5332,
++ }, {
++ .compatible = "qcom,ipq5424-tsens",
++ .data = &data_ipq5424,
++ }, {
+ .compatible = "qcom,ipq8064-tsens",
+ .data = &data_8960,
+ }, {
+--- a/drivers/thermal/qcom/tsens.h
++++ b/drivers/thermal/qcom/tsens.h
+@@ -35,6 +35,7 @@ enum tsens_ver {
+ VER_0_1,
+ VER_1_X,
+ VER_2_X,
++ VER_2_X_NO_RPM,
+ };
+
+ enum tsens_irq_type {
+@@ -168,6 +169,7 @@ enum regfield_ids {
+ TSENS_SW_RST,
+ SENSOR_EN,
+ CODE_OR_TEMP,
++ MAIN_MEASURE_PERIOD,
+
+ /* ----- TM ------ */
+ /* TRDY */
+@@ -651,5 +653,6 @@ extern struct tsens_plat_data data_tsens
+
+ /* TSENS v2 targets */
+ extern struct tsens_plat_data data_8996, data_ipq8074, data_tsens_v2;
++extern const struct tsens_plat_data data_ipq5332, data_ipq5424;
+
+ #endif /* __QCOM_TSENS_H__ */
--- /dev/null
+From e3f90f167a49902cda2408f7e91cca0dcfd5040a Mon Sep 17 00:00:00 2001
+From: George Moussalem <george.moussalem@outlook.com>
+Date: Fri, 28 Feb 2025 09:11:36 +0400
+Subject: [PATCH] thermal/drivers/qcom/tsens: Update conditions to strictly
+ evaluate for IP v2+
+
+TSENS v2.0+ leverage features not available to prior versions such as
+updated interrupts init routine, masked interrupts, and watchdog.
+Currently, the checks in place evaluate whether the IP version is greater
+than v1 which invalidates when updates to v1 or v1 minor versions are
+implemented. As such, update the conditional statements to strictly
+evaluate whether the version is greater than or equal to v2 (inclusive).
+
+Signed-off-by: George Moussalem <george.moussalem@outlook.com>
+Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+Reviewed-by: Amit Kucheria <amitk@kernel.org>
+Link: https://lore.kernel.org/r/DS7PR19MB8883434CAA053648E22AA8AC9DCC2@DS7PR19MB8883.namprd19.prod.outlook.com
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+---
+ drivers/thermal/qcom/tsens.c | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+--- a/drivers/thermal/qcom/tsens.c
++++ b/drivers/thermal/qcom/tsens.c
+@@ -447,7 +447,7 @@ static void tsens_set_interrupt(struct t
+ dev_dbg(priv->dev, "[%u] %s: %s -> %s\n", hw_id, __func__,
+ irq_type ? ((irq_type == 1) ? "UP" : "CRITICAL") : "LOW",
+ enable ? "en" : "dis");
+- if (tsens_version(priv) > VER_1_X)
++ if (tsens_version(priv) >= VER_2_X)
+ tsens_set_interrupt_v2(priv, hw_id, irq_type, enable);
+ else
+ tsens_set_interrupt_v1(priv, hw_id, irq_type, enable);
+@@ -499,7 +499,7 @@ static int tsens_read_irq_state(struct t
+ ret = regmap_field_read(priv->rf[LOW_INT_CLEAR_0 + hw_id], &d->low_irq_clear);
+ if (ret)
+ return ret;
+- if (tsens_version(priv) > VER_1_X) {
++ if (tsens_version(priv) >= VER_2_X) {
+ ret = regmap_field_read(priv->rf[UP_INT_MASK_0 + hw_id], &d->up_irq_mask);
+ if (ret)
+ return ret;
+@@ -543,7 +543,7 @@ static int tsens_read_irq_state(struct t
+
+ static inline u32 masked_irq(u32 hw_id, u32 mask, enum tsens_ver ver)
+ {
+- if (ver > VER_1_X)
++ if (ver >= VER_2_X)
+ return mask & (1 << hw_id);
+
+ /* v1, v0.1 don't have a irq mask register */
+@@ -733,7 +733,7 @@ static int tsens_set_trips(struct therma
+ static int tsens_enable_irq(struct tsens_priv *priv)
+ {
+ int ret;
+- int val = tsens_version(priv) > VER_1_X ? 7 : 1;
++ int val = tsens_version(priv) >= VER_2_X ? 7 : 1;
+
+ ret = regmap_field_write(priv->rf[INT_EN], val);
+ if (ret < 0)
+@@ -1040,7 +1040,7 @@ int __init init_common(struct tsens_priv
+ }
+ }
+
+- if (tsens_version(priv) > VER_1_X && ver_minor > 2) {
++ if (tsens_version(priv) >= VER_2_X && ver_minor > 2) {
+ /* Watchdog is present only on v2.3+ */
+ priv->feat->has_watchdog = 1;
+ for (i = WDOG_BARK_STATUS; i <= CC_MON_MASK; i++) {
--- /dev/null
+From 19f9b02ebc8fe3babefbe76a37c74c5f4c174de1 Mon Sep 17 00:00:00 2001
+From: George Moussalem <george.moussalem@outlook.com>
+Date: Fri, 28 Feb 2025 09:11:37 +0400
+Subject: [PATCH] thermal/drivers/qcom/tsens: Add support for tsens v1 without
+ RPM
+
+Adding generic support for SoCs with tsens v1.0 IP with no RPM.
+Due to lack of RPM, tsens has to be reset and enabled in the driver
+init. SoCs can have support for more sensors than those which will
+actually be enabled. As such, init will only enable those explicitly
+added to the hw_ids array.
+
+Co-developed-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
+Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
+Signed-off-by: George Moussalem <george.moussalem@outlook.com>
+Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+Link: https://lore.kernel.org/r/DS7PR19MB8883C5D7974C7735E23923769DCC2@DS7PR19MB8883.namprd19.prod.outlook.com
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+---
+ drivers/thermal/qcom/tsens-v1.c | 48 +++++++++++++++++++++++++++++++++
+ drivers/thermal/qcom/tsens.c | 14 +++++++---
+ drivers/thermal/qcom/tsens.h | 1 +
+ 3 files changed, 59 insertions(+), 4 deletions(-)
+
+--- a/drivers/thermal/qcom/tsens-v1.c
++++ b/drivers/thermal/qcom/tsens-v1.c
+@@ -79,6 +79,17 @@ static struct tsens_features tsens_v1_fe
+ .trip_max_temp = 120000,
+ };
+
++static struct tsens_features tsens_v1_no_rpm_feat = {
++ .ver_major = VER_1_X_NO_RPM,
++ .crit_int = 0,
++ .combo_int = 0,
++ .adc = 1,
++ .srot_split = 1,
++ .max_sensors = 11,
++ .trip_min_temp = -40000,
++ .trip_max_temp = 120000,
++};
++
+ static const struct reg_field tsens_v1_regfields[MAX_REGFIELDS] = {
+ /* ----- SROT ------ */
+ /* VERSION */
+@@ -150,6 +161,43 @@ static int __init init_8956(struct tsens
+ return init_common(priv);
+ }
+
++static int __init init_tsens_v1_no_rpm(struct tsens_priv *priv)
++{
++ int i, ret;
++ u32 mask = 0;
++
++ ret = init_common(priv);
++ if (ret < 0) {
++ dev_err(priv->dev, "Init common failed %d\n", ret);
++ return ret;
++ }
++
++ ret = regmap_field_write(priv->rf[TSENS_SW_RST], 1);
++ if (ret) {
++ dev_err(priv->dev, "Reset failed\n");
++ return ret;
++ }
++
++ for (i = 0; i < priv->num_sensors; i++)
++ mask |= BIT(priv->sensor[i].hw_id);
++
++ ret = regmap_field_update_bits(priv->rf[SENSOR_EN], mask, mask);
++ if (ret) {
++ dev_err(priv->dev, "Sensor Enable failed\n");
++ return ret;
++ }
++
++ ret = regmap_field_write(priv->rf[TSENS_EN], 1);
++ if (ret) {
++ dev_err(priv->dev, "Enable failed\n");
++ return ret;
++ }
++
++ ret = regmap_field_write(priv->rf[TSENS_SW_RST], 0);
++
++ return ret;
++}
++
+ static const struct tsens_ops ops_generic_v1 = {
+ .init = init_common,
+ .calibrate = calibrate_v1,
+--- a/drivers/thermal/qcom/tsens.c
++++ b/drivers/thermal/qcom/tsens.c
+@@ -975,10 +975,16 @@ int __init init_common(struct tsens_priv
+ ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
+ if (ret)
+ goto err_put_device;
+- if (!enabled && (tsens_version(priv) != VER_2_X_NO_RPM)) {
+- dev_err(dev, "%s: device not enabled\n", __func__);
+- ret = -ENODEV;
+- goto err_put_device;
++ if (!enabled) {
++ switch (tsens_version(priv)) {
++ case VER_1_X_NO_RPM:
++ case VER_2_X_NO_RPM:
++ break;
++ default:
++ dev_err(dev, "%s: device not enabled\n", __func__);
++ ret = -ENODEV;
++ goto err_put_device;
++ }
+ }
+
+ priv->rf[SENSOR_EN] = devm_regmap_field_alloc(dev, priv->srot_map,
+--- a/drivers/thermal/qcom/tsens.h
++++ b/drivers/thermal/qcom/tsens.h
+@@ -34,6 +34,7 @@ enum tsens_ver {
+ VER_0 = 0,
+ VER_0_1,
+ VER_1_X,
++ VER_1_X_NO_RPM,
+ VER_2_X,
+ VER_2_X_NO_RPM,
+ };
--- /dev/null
+From 04b31cc53fe0df0e87a37d18a3c0363d7dee218f Mon Sep 17 00:00:00 2001
+From: Sricharan Ramabadhran <quic_srichara@quicinc.com>
+Date: Fri, 28 Feb 2025 09:11:38 +0400
+Subject: [PATCH] thermal/drivers/qcom/tsens: Add support for IPQ5018 tsens
+
+IPQ5018 has tsens IP V1.0, 5 sensors of which 4 are in use and 1
+interrupt. The IP does not have a RPM, hence use init routine for
+tsens v1.0 without RPM which does not early enable.
+
+Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
+Signed-off-by: George Moussalem <george.moussalem@outlook.com>
+Link: https://lore.kernel.org/r/DS7PR19MB8883BD0E36C08DD1D03CE1CB9DCC2@DS7PR19MB8883.namprd19.prod.outlook.com
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+---
+ drivers/thermal/qcom/tsens-v1.c | 14 ++++++++++++++
+ drivers/thermal/qcom/tsens.c | 3 +++
+ drivers/thermal/qcom/tsens.h | 3 +++
+ 3 files changed, 20 insertions(+)
+
+--- a/drivers/thermal/qcom/tsens-v1.c
++++ b/drivers/thermal/qcom/tsens-v1.c
+@@ -242,3 +242,17 @@ struct tsens_plat_data data_8976 = {
+ .feat = &tsens_v1_feat,
+ .fields = tsens_v1_regfields,
+ };
++
++const struct tsens_ops ops_ipq5018 = {
++ .init = init_tsens_v1_no_rpm,
++ .calibrate = tsens_calibrate_common,
++ .get_temp = get_temp_tsens_valid,
++};
++
++const struct tsens_plat_data data_ipq5018 = {
++ .num_sensors = 5,
++ .ops = &ops_ipq5018,
++ .hw_ids = (unsigned int []){0, 1, 2, 3, 4},
++ .feat = &tsens_v1_no_rpm_feat,
++ .fields = tsens_v1_regfields,
++};
+--- a/drivers/thermal/qcom/tsens.c
++++ b/drivers/thermal/qcom/tsens.c
+@@ -1108,6 +1108,9 @@ static SIMPLE_DEV_PM_OPS(tsens_pm_ops, t
+
+ static const struct of_device_id tsens_table[] = {
+ {
++ .compatible = "qcom,ipq5018-tsens",
++ .data = &data_ipq5018,
++ }, {
+ .compatible = "qcom,ipq5332-tsens",
+ .data = &data_ipq5332,
+ }, {
+--- a/drivers/thermal/qcom/tsens.h
++++ b/drivers/thermal/qcom/tsens.h
+@@ -652,6 +652,9 @@ extern struct tsens_plat_data data_8226,
+ /* TSENS v1 targets */
+ extern struct tsens_plat_data data_tsens_v1, data_8937, data_8976, data_8956;
+
++/* TSENS v1 with no RPM targets */
++extern const struct tsens_plat_data data_ipq5018;
++
+ /* TSENS v2 targets */
+ extern struct tsens_plat_data data_8996, data_ipq8074, data_tsens_v2;
+ extern const struct tsens_plat_data data_ipq5332, data_ipq5424;
+From: George Moussalem <george.moussalem@outlook.com>
+Date: Fri, 28 Feb 2025 09:11:39 +0400
+Subject: [PATCH v9 6/6] arm64: dts: qcom: ipq5018: Add tsens node
+
From: Sricharan Ramabadhran <quic_srichara@quicinc.com>
-Subject: [PATCH] arm64: dts: qcom: ipq5018: Add tsens node
-Date: Fri, 22 Sep 2023 17:21:16 +0530
-IPQ5018 has tsens V1.0 IP with 4 sensors.
+IPQ5018 has tsens V1.0 IP with 5 sensors, though 4 are in use.
There is no RPM, so tsens has to be manually enabled. Adding the tsens
-and nvmem node and IPQ5018 has 4 thermal sensors (zones). With the
-critical temperature being 120'C and action is to reboot. Adding all
-the 4 zones here.
+and nvmem nodes and adding 4 thermal sensors (zones). With the
+critical temperature being 120'C and action is to reboot.
+Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
+Signed-off-by: George Moussalem <george.moussalem@outlook.com>
---
arch/arm64/boot/dts/qcom/ipq5018.dtsi | 169 ++++++++++++++++++++++++++
1 file changed, 169 insertions(+)
+ qfprom: qfprom@a0000 {
+ compatible = "qcom,ipq5018-qfprom", "qcom,qfprom";
-+ reg = <0xa0000 0x1000>;
++ reg = <0x000a0000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ tsens_mode: mode@249 {
-+ reg = <0x249 1>;
++ reg = <0x249 0x1>;
+ bits = <0 3>;
+ };
+
+ tsens_base1: base1@249 {
-+ reg = <0x249 2>;
++ reg = <0x249 0x2>;
+ bits = <3 8>;
+ };
+
+ tsens_base2: base2@24a {
-+ reg = <0x24a 2>;
++ reg = <0x24a 0x2>;
+ bits = <3 8>;
+ };
+
+
+ tsens: thermal-sensor@4a9000 {
+ compatible = "qcom,ipq5018-tsens";
-+ reg = <0x4a9000 0x1000>, /* TM */
-+ <0x4a8000 0x1000>; /* SROT */
++ reg = <0x004a9000 0x1000>, /* TM */
++ <0x004a8000 0x1000>; /* SROT */
+
+ nvmem-cells = <&tsens_mode>,
+ <&tsens_base1>,
+++ /dev/null
-From: Sricharan Ramabadhran <quic_srichara@quicinc.com>
-Subject: [PATCH V2 1/1] dt-bindings: nvmem: Add compatible for IPQ5018
-Date: Fri, 15 Sep 2023 17:31:20 +0530
-
-Document the QFPROM on IPQ5018.
-
-Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
-Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
----
- Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
-+++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
-@@ -19,6 +19,7 @@ properties:
- - enum:
- - qcom,apq8064-qfprom
- - qcom,apq8084-qfprom
-+ - qcom,ipq5018-qfprom
- - qcom,ipq5332-qfprom
- - qcom,ipq6018-qfprom
- - qcom,ipq8064-qfprom
+++ /dev/null
-From: Sricharan Ramabadhran <quic_srichara@quicinc.com>
-Date: Fri, 22 Sep 2023 17:21:13 +0530
-Subject: [PATCH] dt-bindings: thermal: qcom-tsens: Add ipq5018 compatible
-
-IPQ5018 has tsens v1.0 block with 4 sensors and 1 interrupt.
-
-Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
----
---- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
-+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
-@@ -39,6 +39,7 @@ properties:
- - description: v1 of TSENS
- items:
- - enum:
-+ - qcom,ipq5018-tsens
- - qcom,msm8956-tsens
- - qcom,msm8976-tsens
- - qcom,qcs404-tsens
-@@ -234,6 +235,7 @@ allOf:
- compatible:
- contains:
- enum:
-+ - qcom,ipq5018-tsens
- - qcom,ipq8064-tsens
- - qcom,msm8960-tsens
- - qcom,tsens-v0_1
+++ /dev/null
-From: Sricharan Ramabadhran <quic_srichara@quicinc.com>
-Subject: [PATCH] thermal/drivers/qcom: Add new feat for soc without rpm
-Date: Fri, 22 Sep 2023 17:21:14 +0530
-
-In IPQ5018, Tsens IP doesn't have RPM. Hence the early init to
-enable tsens would not be done. So add a flag for that in feat
-and skip enable checks. Without this, tsens probe fails.
-
-Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
-Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
----
- drivers/thermal/qcom/tsens.c | 2 +-
- drivers/thermal/qcom/tsens.h | 3 +++
- 2 files changed, 4 insertions(+), 1 deletion(-)
-
---- a/drivers/thermal/qcom/tsens.c
-+++ b/drivers/thermal/qcom/tsens.c
-@@ -975,7 +975,7 @@ int __init init_common(struct tsens_priv
- ret = regmap_field_read(priv->rf[TSENS_EN], &enabled);
- if (ret)
- goto err_put_device;
-- if (!enabled) {
-+ if (!enabled && !(priv->feat->ignore_enable)) {
- dev_err(dev, "%s: device not enabled\n", __func__);
- ret = -ENODEV;
- goto err_put_device;
---- a/drivers/thermal/qcom/tsens.h
-+++ b/drivers/thermal/qcom/tsens.h
-@@ -505,6 +505,8 @@ enum regfield_ids {
- * @srot_split: does the IP neatly splits the register space into SROT and TM,
- * with SROT only being available to secure boot firmware?
- * @has_watchdog: does this IP support watchdog functionality?
-+ * @ignore_enable: does this IP reside in a soc that does not have rpm to
-+ * do pre-init.
- * @max_sensors: maximum sensors supported by this version of the IP
- * @trip_min_temp: minimum trip temperature supported by this version of the IP
- * @trip_max_temp: maximum trip temperature supported by this version of the IP
-@@ -516,6 +518,7 @@ struct tsens_features {
- unsigned int adc:1;
- unsigned int srot_split:1;
- unsigned int has_watchdog:1;
-+ unsigned int ignore_enable:1;
- unsigned int max_sensors;
- int trip_min_temp;
- int trip_max_temp;
+++ /dev/null
-From: Sricharan Ramabadhran <quic_srichara@quicinc.com>
-Subject: [PATCH] thermal/drivers/tsens: Add support for IPQ5018 tsens
-Date: Fri, 22 Sep 2023 17:21:15 +0530
-
-IPQ5018 has tsens IP V1.0, 4 sensors and 1 interrupt.
-The soc does not have a RPM, hence tsens has to be reset and
-enabled in the driver init. Adding the driver support for same.
-
-Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
----
- drivers/thermal/qcom/tsens-v1.c | 60 +++++++++++++++++++++++++++++++++
- drivers/thermal/qcom/tsens.c | 3 ++
- drivers/thermal/qcom/tsens.h | 2 +-
- 3 files changed, 64 insertions(+), 1 deletion(-)
-
---- a/drivers/thermal/qcom/tsens-v1.c
-+++ b/drivers/thermal/qcom/tsens-v1.c
-@@ -79,6 +79,18 @@ static struct tsens_features tsens_v1_fe
- .trip_max_temp = 120000,
- };
-
-+static struct tsens_features tsens_v1_ipq5018_feat = {
-+ .ver_major = VER_1_X,
-+ .crit_int = 0,
-+ .combo_int = 0,
-+ .adc = 1,
-+ .srot_split = 1,
-+ .max_sensors = 11,
-+ .trip_min_temp = -40000,
-+ .trip_max_temp = 120000,
-+ .ignore_enable = 1,
-+};
-+
- static const struct reg_field tsens_v1_regfields[MAX_REGFIELDS] = {
- /* ----- SROT ------ */
- /* VERSION */
-@@ -150,6 +162,41 @@ static int __init init_8956(struct tsens
- return init_common(priv);
- }
-
-+static int __init init_ipq5018(struct tsens_priv *priv)
-+{
-+ int ret;
-+ u32 mask;
-+
-+ ret = init_common(priv);
-+ if (ret < 0) {
-+ dev_err(priv->dev, "Init common failed %d\n", ret);
-+ return ret;
-+ }
-+
-+ ret = regmap_field_write(priv->rf[TSENS_SW_RST], 1);
-+ if (ret) {
-+ dev_err(priv->dev, "Reset failed\n");
-+ return ret;
-+ }
-+
-+ mask = GENMASK(priv->num_sensors, 0);
-+ ret = regmap_field_update_bits(priv->rf[SENSOR_EN], mask, mask);
-+ if (ret) {
-+ dev_err(priv->dev, "Sensor Enable failed\n");
-+ return ret;
-+ }
-+
-+ ret = regmap_field_write(priv->rf[TSENS_EN], 1);
-+ if (ret) {
-+ dev_err(priv->dev, "Enable failed\n");
-+ return ret;
-+ }
-+
-+ ret = regmap_field_write(priv->rf[TSENS_SW_RST], 0);
-+
-+ return ret;
-+}
-+
- static const struct tsens_ops ops_generic_v1 = {
- .init = init_common,
- .calibrate = calibrate_v1,
-@@ -194,3 +241,16 @@ struct tsens_plat_data data_8976 = {
- .feat = &tsens_v1_feat,
- .fields = tsens_v1_regfields,
- };
-+
-+const struct tsens_ops ops_ipq5018 = {
-+ .init = init_ipq5018,
-+ .calibrate = tsens_calibrate_common,
-+ .get_temp = get_temp_tsens_valid,
-+};
-+
-+struct tsens_plat_data data_ipq5018 = {
-+ .num_sensors = 5,
-+ .ops = &ops_ipq5018,
-+ .feat = &tsens_v1_ipq5018_feat,
-+ .fields = tsens_v1_regfields,
-+};
---- a/drivers/thermal/qcom/tsens.c
-+++ b/drivers/thermal/qcom/tsens.c
-@@ -1102,6 +1102,9 @@ static SIMPLE_DEV_PM_OPS(tsens_pm_ops, t
-
- static const struct of_device_id tsens_table[] = {
- {
-+ .compatible = "qcom,ipq5018-tsens",
-+ .data = &data_ipq5018,
-+ }, {
- .compatible = "qcom,ipq8064-tsens",
- .data = &data_8960,
- }, {
---- a/drivers/thermal/qcom/tsens.h
-+++ b/drivers/thermal/qcom/tsens.h
-@@ -650,7 +650,7 @@ extern struct tsens_plat_data data_8960;
- extern struct tsens_plat_data data_8226, data_8909, data_8916, data_8939, data_8974, data_9607;
-
- /* TSENS v1 targets */
--extern struct tsens_plat_data data_tsens_v1, data_8937, data_8976, data_8956;
-+extern struct tsens_plat_data data_tsens_v1, data_8937, data_8976, data_8956, data_ipq5018;
-
- /* TSENS v2 targets */
- extern struct tsens_plat_data data_8996, data_ipq8074, data_tsens_v2;
+
tsens: thermal-sensor@4a9000 {
compatible = "qcom,ipq5018-tsens";
- reg = <0x4a9000 0x1000>, /* TM */
+ reg = <0x004a9000 0x1000>, /* TM */
+
qfprom: qfprom@a0000 {
compatible = "qcom,ipq5018-qfprom", "qcom,qfprom";
- reg = <0xa0000 0x1000>;
+ reg = <0x000a0000 0x1000>;
projects / thirdparty / openwrt.git / commitdiff
