]> git.ipfire.org Git - thirdparty/openwrt.git/commitdiff
treewide: dts: fix spi-gpio chip select GPIO polarity 19845/head
authorShiji Yang <yangshiji66@outlook.com>
Mon, 1 Sep 2025 01:17:49 +0000 (09:17 +0800)
committerHauke Mehrtens <hauke@hauke-m.de>
Sun, 19 Oct 2025 22:28:15 +0000 (00:28 +0200)
The SPI chip select GPIO polarity is active low by default. We must
use "spi-cs-high" dts property to toggle the polarity. The polarity
on "cs-gpios" won't take effect at all[1]. Fix these incorrect GPIO
polarities to silence the kernel warnings.

[1] Refer to Linux/Documentation/devicetree/bindings/spi/spi-controller.yaml
```
      device node     | cs-gpio       | CS pin state active | Note
      ================+===============+=====================+=====
      spi-cs-high     | -             | H                   |
      -               | -             | L                   |
      spi-cs-high     | ACTIVE_HIGH   | H                   |
      -               | ACTIVE_HIGH   | L                   | 1
      spi-cs-high     | ACTIVE_LOW    | H                   | 2
      -               | ACTIVE_LOW    | L                   |

      Notes:
      1) Should print a warning about polarity inversion.
         Here it would be wise to avoid and define the gpio as
         ACTIVE_LOW.
      2) Should print a warning about polarity inversion
         because ACTIVE_LOW is overridden by spi-cs-high.
         Should be generally avoided and be replaced by
         spi-cs-high + ACTIVE_HIGH.
```

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/19845
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
target/linux/ath79/dts/ar7242_ubnt_sw.dtsi
target/linux/ath79/dts/qca9531_tplink_tl-mr3420-v3.dts
target/linux/ath79/dts/qca9558_ubnt_nanobeam-ac-xc.dts
target/linux/ath79/dts/qca9561_tplink_archer-c25-v1.dts
target/linux/ath79/dts/qca9561_tplink_archer-c5x.dtsi
target/linux/ath79/dts/qca9563_tplink_archer-c7-v4.dts
target/linux/ipq40xx/files-6.12/arch/arm/boot/dts/qcom/qcom-ipq4018-rutx50.dts
target/linux/ramips/dts/mt7628an_teltonika_rut9xx.dtsi

index 9834bf70c2a86ecc0a480526b0a24258f87e0b5c..2d79e39062b30ca1b4aa8d898b8a8ed5d2ce62cc 100644 (file)
@@ -46,7 +46,7 @@
 
                sck-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
                mosi-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
-               cs-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
+               cs-gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
                num-chipselects = <1>;
 
                gpio_hc595: gpio_spi@0 {
index b46dbc98c2e578dd83847995d6fe5c88156a8f88..ca005d372215a1f970cb89cd3e6dde2bffa80fa8 100644 (file)
@@ -26,7 +26,7 @@
 
                sck-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
                mosi-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
-               cs-gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
+               cs-gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
                num-chipselects = <1>;
 
                led_gpio: led_gpio@0 {
index b42ea4dbc272e99784ac9c4d2cb795295ab96768..d513f5a32a224d7dbaad35c54ad200acc0ede5ca 100644 (file)
@@ -39,7 +39,7 @@
 
                sck-gpios  = <&gpio 0 GPIO_ACTIVE_HIGH>;
                mosi-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
-               cs-gpios   = <&gpio 3 GPIO_ACTIVE_HIGH>;
+               cs-gpios   = <&gpio 3 GPIO_ACTIVE_LOW>;
                num-chipselects = <1>;
 
                led_gpio: led_gpio@0 {
index e4d9b99a60f946ed5e00af38296aa87a57fed02d..c581386b290b9c46dfc68cda3198c511741a1f9a 100644 (file)
@@ -25,7 +25,7 @@
 
                sck-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
                mosi-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
-               cs-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
+               cs-gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
                num-chipselects = <1>;
 
                led_gpio: led_gpio@0 {
index 80e5db55e4ac5ded1f8588c92475dc7768710306..672c7cc62d056df3c0ef00c4b465664e080b1e8f 100644 (file)
@@ -23,7 +23,7 @@
 
                sck-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
                mosi-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
-               cs-gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
+               cs-gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
                num-chipselects = <1>;
 
                led_gpio: led_gpio@0 {
index 05dd95474e8f2fef42bf3e29dbbeb00ed3a6ef76..d567af00948f215accda418161f611b0ee3e841d 100644 (file)
@@ -25,7 +25,7 @@
 
                sck-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;        // 74HC595 SRCLK (Serial Clock)
                mosi-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;       // 74HC595 SER (Serial)
-               cs-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;         // 74HC595 RCLK (Register Clock)
+               cs-gpios = <&gpio 16 GPIO_ACTIVE_LOW>;          // 74HC595 RCLK (Register Clock)
                num-chipselects = <1>;
 
                led_gpio: led_gpio@0 {
index 63f465c9c2c2109ade00d7fb3514157fd0ced2a9..9bc9126ccdee05c9551a5e203edbcca6242c169b 100644 (file)
 
                        gpio-sck = <&tlmm 1 GPIO_ACTIVE_HIGH>;
                        gpio-mosi = <&tlmm 3 GPIO_ACTIVE_HIGH>;
-                       cs-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+                       cs-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
                        num-chipselects = <1>;
 
                        shift_io: shift_io@0 {
index 72835ae82611fa23d6471d3e62054502d76ebd98..ed983e9ff4b9082fbcf5eebb408aae0279a69ed2 100644 (file)
@@ -24,7 +24,7 @@
 
                sck-gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
                mosi-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
-               cs-gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
+               cs-gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
                num-chipselects = <1>;
 
                gpio_hc595: gpio_hc595@0 {