rockchip: add Radxa ROCK 4D support

Hardware
--------
RockChip RK3576 ARM64 (8 cores)
2/4/8/16GB LPDDR5 RAM
1x 1000 Base-T (with optional PoE support)
2x LEDs (POWER / USER)
eMMC/UFS connector
Micro-SD Slot
HDMI OUT
PCIe FPC connector
2x USB 2.0 Port
2x USB 3.0 Port
USB Type-C PD Power

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/20041
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk
index 56cf702bbbccc4b9cade494f0a340729e7a295fa..160e1f5203ea51360191d525a4e4a21e67b051df 100644 (file)
--- a/target/linux/rockchip/image/armv8.mk
+++ b/target/linux/rockchip/image/armv8.mk
@@ -27,6 +27,11 @@ define Device/rk3568
   KERNEL_LOADADDR := 0x03000000
 endef
 
+define Device/rk3576
+  SOC := rk3576
+  KERNEL_LOADADDR := 0x43000000
+endef
+
 define Device/rk3582
   SOC := rk3582
   KERNEL_LOADADDR := 0x03000000
@@ -246,6 +251,13 @@ define Device/radxa_rock-4c-plus
 endef
 TARGET_DEVICES += radxa_rock-4c-plus
 
+define Device/radxa_rock-4d
+  $(Device/rk3576)
+  DEVICE_VENDOR := Radxa
+  DEVICE_MODEL := ROCK 4D
+endef
+TARGET_DEVICES += radxa_rock-4d
+
 define Device/radxa_rock-4se
   $(Device/rk3399)
   DEVICE_VENDOR := Radxa

diff --git a/target/linux/rockchip/image/default.bootscript b/target/linux/rockchip/image/default.bootscript
index 10ca93ceda753f20cf2a45e4e64dcf93d1c6a714..0d825483c7d61b1083264b8fc446fd0b4bdcc40d 100644 (file)
--- a/target/linux/rockchip/image/default.bootscript
+++ b/target/linux/rockchip/image/default.bootscript
@@ -1,16 +1,18 @@
 part uuid ${devtype} ${devnum}:2 uuid
 
-if test $stdout = 'serial@fe660000' ;
-then serial_addr=',0xfe660000';
+if test $stdout = 'serial@2ad40000' ;
+then serial_addr=',0x2ad40000'; serial_port='ttyS0';
+elif test $stdout = 'serial@fe660000' ;
+then serial_addr=',0xfe660000'; serial_port='ttyS2';
 elif test $stdout = 'serial@feb50000' ;
-then serial_addr=',0xfeb50000';
+then serial_addr=',0xfeb50000'; serial_port='ttyS2';
 elif test $stdout = 'serial@ff130000' ;
-then serial_addr=',0xff130000';
+then serial_addr=',0xff130000'; serial_port='ttyS2';
 elif test $stdout = 'serial@ff1a0000' ;
-then serial_addr=',0xff1a0000';
+then serial_addr=',0xff1a0000'; serial_port='ttyS2';
 fi;
 
-setenv bootargs "console=ttyS2,1500000 earlycon=uart8250,mmio32${serial_addr} root=PARTUUID=${uuid} rw rootwait";
+setenv bootargs "console=${serial_port},1500000 earlycon=uart8250,mmio32${serial_addr} root=PARTUUID=${uuid} rw rootwait";
 
 load ${devtype} ${devnum}:1 ${kernel_addr_r} kernel.img
 

diff --git a/target/linux/rockchip/patches-6.12/051-01-v6.15-arm64-dts-rockchip-Add-Radxa-ROCK-4D-device-tree.patch b/target/linux/rockchip/patches-6.12/051-01-v6.15-arm64-dts-rockchip-Add-Radxa-ROCK-4D-device-tree.patch
new file mode 100644 (file)
index 0000000..1e2418b
--- /dev/null
+++ b/target/linux/rockchip/patches-6.12/051-01-v6.15-arm64-dts-rockchip-Add-Radxa-ROCK-4D-device-tree.patch
@@ -0,0 +1,731 @@
+From a0fb7eca9c099867596cbd1a44cc740882bdcbbe Mon Sep 17 00:00:00 2001
+From: Stephen Chen <stephen@radxa.com>
+Date: Tue, 18 Feb 2025 11:04:19 -0500
+Subject: [PATCH] arm64: dts: rockchip: Add Radxa ROCK 4D device tree
+
+The Radxa ROCK 4D board is based on the Rockchip rk3576 SoC.
+
+The device tree adds support for basic devices:
+ - UART
+ - SD Card
+ - Ethernet
+ - USB
+ - RTC
+
+It has 4 USB ports but only 3 are usable as the top left one is used
+for maskrom.
+
+It has a USB-C port that is only used for powering the board.
+
+Signed-off-by: Stephen Chen <stephen@radxa.com>
+Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
+Link: https://lore.kernel.org/r/20250218160714.140709-3-detlev.casanova@collabora.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/Makefile         |   1 +
+ .../boot/dts/rockchip/rk3576-rock-4d.dts      | 689 ++++++++++++++++++
+ 2 files changed, 690 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
+
+--- a/arch/arm64/boot/dts/rockchip/Makefile
++++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -125,6 +125,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-ro
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-display-vz.dtbo
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo
++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-rock-4d.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3582-radxa-e52c.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-armsom-sige7.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-coolpi-cm5-evb.dtb
+--- /dev/null
++++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
+@@ -0,0 +1,689 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Copyright (c) 2024 Radxa Computer (Shenzhen) Co., Ltd.
++ */
++
++/dts-v1/;
++
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/leds/common.h>
++#include <dt-bindings/pinctrl/rockchip.h>
++#include <dt-bindings/pwm/pwm.h>
++#include <dt-bindings/soc/rockchip,vop2.h>
++#include <dt-bindings/usb/pd.h>
++#include "rk3576.dtsi"
++
++/ {
++      model = "Radxa ROCK 4D";
++      compatible = "radxa,rock-4d", "rockchip,rk3576";
++
++      aliases {
++              ethernet0 = &gmac0;
++              mmc0 = &sdmmc;
++      };
++
++      chosen {
++              stdout-path = "serial0:1500000n8";
++      };
++
++      leds: leds {
++              compatible = "gpio-leds";
++              pinctrl-names = "default";
++              pinctrl-0 = <&led_rgb_g &led_rgb_r>;
++
++              power-led {
++                      color = <LED_COLOR_ID_GREEN>;
++                      function = LED_FUNCTION_STATUS;
++                      gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
++                      linux,default-trigger = "default-on";
++              };
++
++              user-led {
++                      color = <LED_COLOR_ID_BLUE>;
++                      function = LED_FUNCTION_HEARTBEAT;
++                      gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
++                      linux,default-trigger = "heartbeat";
++              };
++      };
++
++      vcc_12v0_dcin: regulator-vcc-12v0-dcin {
++              compatible = "regulator-fixed";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <12000000>;
++              regulator-max-microvolt = <12000000>;
++              regulator-name = "vcc_12v0_dcin";
++      };
++
++      vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
++              compatible = "regulator-fixed";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <1100000>;
++              regulator-max-microvolt = <1100000>;
++              regulator-name = "vcc_1v1_nldo_s3";
++              vin-supply = <&vcc_5v0_sys>;
++      };
++
++      vcc_1v2_ufs_vccq_s0: regulator-vcc-1v2-ufs-vccq-s0 {
++              compatible = "regulator-fixed";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <1200000>;
++              regulator-max-microvolt = <1200000>;
++              regulator-name = "vcc_1v2_ufs_vccq_s0";
++              vin-supply = <&vcc_5v0_sys>;
++      };
++
++      vcc_1v8_s0: regulator-vcc-1v8-s0 {
++              compatible = "regulator-fixed";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <1800000>;
++              regulator-max-microvolt = <1800000>;
++              regulator-name = "vcc_1v8_s0";
++              vin-supply = <&vcc_1v8_s3>;
++      };
++
++      vcc_1v8_ufs_vccq2_s0: regulator-vcc-1v8-ufs-vccq2-s0 {
++              compatible = "regulator-fixed";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <1800000>;
++              regulator-max-microvolt = <1800000>;
++              regulator-name = "vcc_1v8_ufs_vccq2_s0";
++              vin-supply = <&vcc_1v8_s3>;
++      };
++
++      vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
++              compatible = "regulator-fixed";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <2000000>;
++              regulator-max-microvolt = <2000000>;
++              regulator-name = "vcc_2v0_pldo_s3";
++              vin-supply = <&vcc_5v0_sys>;
++      };
++
++      vcc_3v3_pcie: regulator-vcc-3v3-pcie {
++              compatible = "regulator-fixed";
++              enable-active-high;
++              gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
++              pinctrl-names = "default";
++              pinctrl-0 = <&pcie_pwren>;
++              regulator-min-microvolt = <3300000>;
++              regulator-max-microvolt = <3300000>;
++              regulator-name = "vcc_3v3_pcie";
++              startup-delay-us = <5000>;
++              vin-supply = <&vcc_5v0_sys>;
++      };
++
++      vcc_3v3_rtc_s5: regulator-vcc-3v3-rtc-s5 {
++              compatible = "regulator-fixed";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <3300000>;
++              regulator-max-microvolt = <3300000>;
++              regulator-name = "vcc_3v3_rtc_s5";
++              vin-supply = <&vcc_5v0_sys>;
++      };
++
++      vcc_3v3_s0: regulator-vcc-3v3-s0 {
++              compatible = "regulator-fixed";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <3300000>;
++              regulator-max-microvolt = <3300000>;
++              regulator-name = "vcc_3v3_s0";
++              vin-supply = <&vcc_3v3_s3>;
++      };
++
++      vcc_3v3_ufs_s0: regulator-vcc-ufs-s0 {
++              compatible = "regulator-fixed";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <3300000>;
++              regulator-max-microvolt = <3300000>;
++              regulator-name = "vcc_3v3_ufs_s0";
++              vin-supply = <&vcc_5v0_sys>;
++      };
++
++      vcc_5v0_device: regulator-vcc-5v0-device {
++              compatible = "regulator-fixed";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <5000000>;
++              regulator-max-microvolt = <5000000>;
++              regulator-name = "vcc_5v0_device";
++              vin-supply = <&vcc_12v0_dcin>;
++      };
++
++      vcc_5v0_host: regulator-vcc-5v0-host {
++              compatible = "regulator-fixed";
++              enable-active-high;
++              gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
++              pinctrl-names = "default";
++              pinctrl-0 = <&usb_host_pwren>;
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <5000000>;
++              regulator-max-microvolt = <5000000>;
++              regulator-name = "vcc5v0_host";
++              vin-supply = <&vcc_5v0_device>;
++      };
++
++      vcc_5v0_sys: regulator-vcc-5v0-sys {
++              compatible = "regulator-fixed";
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <5000000>;
++              regulator-max-microvolt = <5000000>;
++              regulator-name = "vcc_5v0_sys";
++              vin-supply = <&vcc_12v0_dcin>;
++      };
++};
++
++&combphy1_psu {
++      status = "okay";
++};
++
++&cpu_b0 {
++      cpu-supply = <&vdd_cpu_big_s0>;
++};
++
++&cpu_b1 {
++      cpu-supply = <&vdd_cpu_big_s0>;
++};
++
++&cpu_b2 {
++      cpu-supply = <&vdd_cpu_big_s0>;
++};
++
++&cpu_b3 {
++      cpu-supply = <&vdd_cpu_big_s0>;
++};
++
++&cpu_l0 {
++      cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l1 {
++      cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l2 {
++      cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&cpu_l3 {
++      cpu-supply = <&vdd_cpu_lit_s0>;
++};
++
++&gmac0 {
++      clock_in_out = "output";
++      phy-handle = <&rgmii_phy0>;
++      phy-mode = "rgmii-id";
++      pinctrl-names = "default";
++      pinctrl-0 = <&eth0m0_miim
++                   &eth0m0_tx_bus2
++                   &eth0m0_rx_bus2
++                   &eth0m0_rgmii_clk
++                   &eth0m0_rgmii_bus
++                   &ethm0_clk0_25m_out>;
++      status = "okay";
++};
++
++&gpu {
++      mali-supply = <&vdd_gpu_s0>;
++      status = "okay";
++};
++
++&i2c1 {
++      status = "okay";
++
++      pmic@23 {
++              compatible = "rockchip,rk806";
++              reg = <0x23>;
++              #gpio-cells = <2>;
++              gpio-controller;
++              interrupt-parent = <&gpio0>;
++              interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
++              pinctrl-names = "default";
++              pinctrl-0 = <&pmic_pins
++                           &rk806_dvs1_null
++                           &rk806_dvs2_null
++                           &rk806_dvs3_null>;
++              system-power-controller;
++              vcc1-supply = <&vcc_5v0_sys>;
++              vcc2-supply = <&vcc_5v0_sys>;
++              vcc3-supply = <&vcc_5v0_sys>;
++              vcc4-supply = <&vcc_5v0_sys>;
++              vcc5-supply = <&vcc_5v0_sys>;
++              vcc6-supply = <&vcc_5v0_sys>;
++              vcc7-supply = <&vcc_5v0_sys>;
++              vcc8-supply = <&vcc_5v0_sys>;
++              vcc9-supply = <&vcc_5v0_sys>;
++              vcc10-supply = <&vcc_5v0_sys>;
++              vcc11-supply = <&vcc_2v0_pldo_s3>;
++              vcc12-supply = <&vcc_5v0_sys>;
++              vcc13-supply = <&vcc_1v1_nldo_s3>;
++              vcc14-supply = <&vcc_1v1_nldo_s3>;
++              vcca-supply = <&vcc_5v0_sys>;
++
++              rk806_dvs1_null: dvs1-null-pins {
++                      pins = "gpio_pwrctrl1";
++                      function = "pin_fun0";
++              };
++
++              rk806_dvs1_pwrdn: dvs1-pwrdn-pins {
++                      pins = "gpio_pwrctrl1";
++                      function = "pin_fun2";
++              };
++
++              rk806_dvs1_rst: dvs1-rst-pins {
++                      pins = "gpio_pwrctrl1";
++                      function = "pin_fun3";
++              };
++
++              rk806_dvs1_slp: dvs1-slp-pins {
++                      pins = "gpio_pwrctrl1";
++                      function = "pin_fun1";
++              };
++
++              rk806_dvs2_dvs: dvs2-dvs-pins {
++                      pins = "gpio_pwrctrl2";
++                      function = "pin_fun4";
++              };
++
++              rk806_dvs2_gpio: dvs2-gpio-pins {
++                      pins = "gpio_pwrctrl2";
++                      function = "pin_fun5";
++              };
++
++              rk806_dvs2_null: dvs2-null-pins {
++                      pins = "gpio_pwrctrl2";
++                      function = "pin_fun0";
++              };
++
++              rk806_dvs2_pwrdn: dvs2-pwrdn-pins {
++                      pins = "gpio_pwrctrl2";
++                      function = "pin_fun2";
++              };
++
++              rk806_dvs2_rst: dvs2-rst-pins {
++                      pins = "gpio_pwrctrl2";
++                      function = "pin_fun3";
++              };
++
++              rk806_dvs2_slp: dvs2-slp-pins {
++                      pins = "gpio_pwrctrl2";
++                      function = "pin_fun1";
++              };
++
++              rk806_dvs3_dvs: dvs3-dvs-pins {
++                      pins = "gpio_pwrctrl3";
++                      function = "pin_fun4";
++              };
++
++              rk806_dvs3_gpio: dvs3-gpio-pins {
++                      pins = "gpio_pwrctrl3";
++                      function = "pin_fun5";
++              };
++
++              rk806_dvs3_null: dvs3-null-pins {
++                      pins = "gpio_pwrctrl3";
++                      function = "pin_fun0";
++              };
++
++              rk806_dvs3_pwrdn: dvs3-pwrdn-pins {
++                      pins = "gpio_pwrctrl3";
++                      function = "pin_fun2";
++              };
++
++              rk806_dvs3_rst: dvs3-rst-pins {
++                      pins = "gpio_pwrctrl3";
++                      function = "pin_fun3";
++              };
++
++              rk806_dvs3_slp: dvs3-slp-pins {
++                      pins = "gpio_pwrctrl3";
++                      function = "pin_fun1";
++              };
++
++              regulators {
++                      vdd_cpu_big_s0: dcdc-reg1 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-enable-ramp-delay = <400>;
++                              regulator-min-microvolt = <550000>;
++                              regulator-max-microvolt = <950000>;
++                              regulator-name = "vdd_cpu_big_s0";
++                              regulator-ramp-delay = <12500>;
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vdd_npu_s0: dcdc-reg2 {
++                              regulator-boot-on;
++                              regulator-enable-ramp-delay = <400>;
++                              regulator-min-microvolt = <550000>;
++                              regulator-max-microvolt = <950000>;
++                              regulator-name = "vdd_npu_s0";
++                              regulator-ramp-delay = <12500>;
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vdd_cpu_lit_s0: dcdc-reg3 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <550000>;
++                              regulator-max-microvolt = <950000>;
++                              regulator-name = "vdd_cpu_lit_s0";
++                              regulator-ramp-delay = <12500>;
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                                      regulator-suspend-microvolt = <750000>;
++                              };
++                      };
++
++                      vcc_3v3_s3: dcdc-reg4 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <3300000>;
++                              regulator-max-microvolt = <3300000>;
++                              regulator-name = "vcc_3v3_s3";
++                              regulator-state-mem {
++                                      regulator-on-in-suspend;
++                                      regulator-suspend-microvolt = <3300000>;
++                              };
++                      };
++
++                      vdd_gpu_s0: dcdc-reg5 {
++                              regulator-boot-on;
++                              regulator-enable-ramp-delay = <400>;
++                              regulator-min-microvolt = <550000>;
++                              regulator-max-microvolt = <900000>;
++                              regulator-name = "vdd_gpu_s0";
++                              regulator-ramp-delay = <12500>;
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                                      regulator-suspend-microvolt = <850000>;
++                              };
++                      };
++
++                      vddq_ddr_s0: dcdc-reg6 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-name = "vddq_ddr_s0";
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vdd_logic_s0: dcdc-reg7 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <550000>;
++                              regulator-max-microvolt = <800000>;
++                              regulator-name = "vdd_logic_s0";
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vcc_1v8_s3: dcdc-reg8 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <1800000>;
++                              regulator-max-microvolt = <1800000>;
++                              regulator-name = "vcc_1v8_s3";
++                              regulator-state-mem {
++                                      regulator-on-in-suspend;
++                                      regulator-suspend-microvolt = <1800000>;
++                              };
++                      };
++
++                      vdd2_ddr_s3: dcdc-reg9 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-name = "vdd2_ddr_s3";
++                              regulator-state-mem {
++                                      regulator-on-in-suspend;
++                              };
++                      };
++
++                      vdd_ddr_s0: dcdc-reg10 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <550000>;
++                              regulator-max-microvolt = <1200000>;
++                              regulator-name = "vdd_ddr_s0";
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vcca_1v8_s0: pldo-reg1 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <1800000>;
++                              regulator-max-microvolt = <1800000>;
++                              regulator-name = "vcca_1v8_s0";
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vcca1v8_pldo2_s0: pldo-reg2 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <1800000>;
++                              regulator-max-microvolt = <1800000>;
++                              regulator-name = "vcca1v8_pldo2_s0";
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vdda_1v2_s0: pldo-reg3 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <1200000>;
++                              regulator-max-microvolt = <1200000>;
++                              regulator-name = "vdda_1v2_s0";
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vcca_3v3_s0: pldo-reg4 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <3300000>;
++                              regulator-max-microvolt = <3300000>;
++                              regulator-name = "vcca_3v3_s0";
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vccio_sd_s0: pldo-reg5 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <1800000>;
++                              regulator-max-microvolt = <3300000>;
++                              regulator-name = "vccio_sd_s0";
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vcca1v8_pldo6_s3: pldo-reg6 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <1800000>;
++                              regulator-max-microvolt = <1800000>;
++                              regulator-name = "vcca1v8_pldo6_s3";
++                              regulator-state-mem {
++                                      regulator-on-in-suspend;
++                                      regulator-suspend-microvolt = <1800000>;
++                              };
++                      };
++
++                      vdd_0v75_s3: nldo-reg1 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <750000>;
++                              regulator-max-microvolt = <750000>;
++                              regulator-name = "vdd_0v75_s3";
++                              regulator-state-mem {
++                                      regulator-on-in-suspend;
++                                      regulator-suspend-microvolt = <750000>;
++                              };
++                      };
++
++                      vdda_ddr_pll_s0: nldo-reg2 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <850000>;
++                              regulator-max-microvolt = <850000>;
++                              regulator-name = "vdda_ddr_pll_s0";
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vdda0v75_hdmi_s0: nldo-reg3 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <837500>;
++                              regulator-max-microvolt = <837500>;
++                              regulator-name = "vdda0v75_hdmi_s0";
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vdda_0v85_s0: nldo-reg4 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <850000>;
++                              regulator-max-microvolt = <850000>;
++                              regulator-name = "vdda_0v85_s0";
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++
++                      vdda_0v75_s0: nldo-reg5 {
++                              regulator-always-on;
++                              regulator-boot-on;
++                              regulator-min-microvolt = <750000>;
++                              regulator-max-microvolt = <750000>;
++                              regulator-name = "vdda_0v75_s0";
++                              regulator-state-mem {
++                                      regulator-off-in-suspend;
++                              };
++                      };
++              };
++      };
++};
++
++&i2c2 {
++      status = "okay";
++
++      hym8563: rtc@51 {
++              compatible = "haoyu,hym8563";
++              reg = <0x51>;
++              #clock-cells = <0>;
++              clock-output-names = "hym8563";
++              interrupt-parent = <&gpio0>;
++              interrupts = <RK_PA0 IRQ_TYPE_LEVEL_LOW>;
++              pinctrl-names = "default";
++              pinctrl-0 = <&hym8563_int>;
++              wakeup-source;
++      };
++};
++
++&mdio0 {
++      rgmii_phy0: ethernet-phy@1 {
++              compatible = "ethernet-phy-ieee802.3-c22";
++              reg = <0x1>;
++              clocks = <&cru REFCLKO25M_GMAC0_OUT>;
++              pinctrl-names = "default";
++              pinctrl-0 = <&rtl8211f_rst>;
++              reset-assert-us = <20000>;
++              reset-deassert-us = <100000>;
++              reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
++      };
++};
++
++&pinctrl {
++      hym8563 {
++              hym8563_int: hym8563-int {
++                      rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
++              };
++      };
++
++      leds {
++              led_rgb_g: led-green-en {
++                      rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
++              };
++              led_rgb_r: led-red-en {
++                      rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
++              };
++      };
++
++      rtl8211f {
++              rtl8211f_rst: rtl8211f-rst {
++                      rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
++              };
++      };
++
++      pcie {
++              pcie_pwren: pcie-pwren {
++                      rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
++              };
++      };
++
++      usb {
++              usb_host_pwren: usb-host-pwren {
++                      rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
++              };
++      };
++};
++
++&sdmmc {
++      bus-width = <4>;
++      cap-mmc-highspeed;
++      cap-sd-highspeed;
++      disable-wp;
++      max-frequency = <200000000>;
++      no-sdio;
++      no-mmc;
++      sd-uhs-sdr104;
++      vmmc-supply = <&vcc_3v3_s3>;
++      vqmmc-supply = <&vccio_sd_s0>;
++      status = "okay";
++};
++
++&u2phy0 {
++      status = "okay";
++};
++
++&u2phy1 {
++      status = "okay";
++};
++
++&uart0 {
++      pinctrl-0 = <&uart0m0_xfer>;
++      status = "okay";
++};
++
++&usb_drd1_dwc3 {
++      dr_mode = "host";
++      status = "okay";
++};

diff --git a/target/linux/rockchip/patches-6.12/051-02-v6.15-arm64-dts-rockchip-Add-HDMI-support-for-rock-4d.patch b/target/linux/rockchip/patches-6.12/051-02-v6.15-arm64-dts-rockchip-Add-HDMI-support-for-rock-4d.patch
new file mode 100644 (file)
index 0000000..f344cfc
--- /dev/null
+++ b/target/linux/rockchip/patches-6.12/051-02-v6.15-arm64-dts-rockchip-Add-HDMI-support-for-rock-4d.patch
@@ -0,0 +1,80 @@
+From 4e4f54aaec204a27d51386a9dd0d3a805fea57f4 Mon Sep 17 00:00:00 2001
+From: Detlev Casanova <detlev.casanova@collabora.com>
+Date: Thu, 6 Mar 2025 13:06:31 -0500
+Subject: [PATCH] arm64: dts: rockchip: Add HDMI support for rock-4d
+
+Enable HDMI and VOP nodes for the rock-4d board.
+
+Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
+Link: https://lore.kernel.org/r/20250306180737.127726-1-detlev.casanova@collabora.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ .../boot/dts/rockchip/rk3576-rock-4d.dts      | 46 +++++++++++++++++++
+ 1 file changed, 46 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
+@@ -26,6 +26,17 @@
+               stdout-path = "serial0:1500000n8";
+       };
+ 
++      hdmi-con {
++              compatible = "hdmi-connector";
++              type = "a";
++
++              port {
++                      hdmi_con_in: endpoint {
++                              remote-endpoint = <&hdmi_out_con>;
++                      };
++              };
++      };
++
+       leds: leds {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+@@ -238,6 +249,26 @@
+       status = "okay";
+ };
+ 
++&hdmi {
++      status = "okay";
++};
++
++&hdmi_in {
++      hdmi_in_vp0: endpoint {
++              remote-endpoint = <&vp0_out_hdmi>;
++      };
++};
++
++&hdmi_out {
++      hdmi_out_con: endpoint {
++              remote-endpoint = <&hdmi_con_in>;
++      };
++};
++
++&hdptxphy {
++      status = "okay";
++};
++
+ &i2c1 {
+       status = "okay";
+ 
+@@ -687,3 +718,18 @@
+       dr_mode = "host";
+       status = "okay";
+ };
++
++&vop {
++      status = "okay";
++};
++
++&vop_mmu {
++      status = "okay";
++};
++
++&vp0 {
++      vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
++              reg = <ROCKCHIP_VOP2_EP_HDMI0>;
++              remote-endpoint = <&hdmi_in_vp0>;
++      };
++};

diff --git a/target/linux/rockchip/patches-6.12/051-03-v6.15-arm64-dts-rockchip-Add-SPI-NOR-device-on-the-ROCK-4D.patch b/target/linux/rockchip/patches-6.12/051-03-v6.15-arm64-dts-rockchip-Add-SPI-NOR-device-on-the-ROCK-4D.patch
new file mode 100644 (file)
index 0000000..f5185d8
--- /dev/null
+++ b/target/linux/rockchip/patches-6.12/051-03-v6.15-arm64-dts-rockchip-Add-SPI-NOR-device-on-the-ROCK-4D.patch
@@ -0,0 +1,42 @@
+From ba82f56bbf20e4166c988621cd0507509872848e Mon Sep 17 00:00:00 2001
+From: Detlev Casanova <detlev.casanova@collabora.com>
+Date: Fri, 28 Feb 2025 09:50:48 -0500
+Subject: [PATCH] arm64: dts: rockchip: Add SPI NOR device on the ROCK 4D
+
+The SPI NOR chip is connected on the FSPI0 core, so enable the sfc0 node
+and add the flash device to it.
+
+The SPI NOR won't work at higher speed than 50 MHz, specify the limit.
+
+Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
+Link: https://lore.kernel.org/r/20250228145304.581349-3-detlev.casanova@collabora.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
+@@ -701,6 +701,22 @@
+       status = "okay";
+ };
+ 
++
++&sfc0 {
++      pinctrl-names = "default";
++      pinctrl-0 = <&fspi0_pins &fspi0_csn0>;
++      status = "okay";
++
++      flash@0 {
++              compatible = "jedec,spi-nor";
++              reg = <0>;
++              spi-max-frequency = <50000000>;
++              spi-rx-bus-width = <4>;
++              spi-tx-bus-width = <1>;
++              vcc-supply = <&vcc_1v8_s3>;
++      };
++};
++
+ &u2phy0 {
+       status = "okay";
+ };

diff --git a/target/linux/rockchip/patches-6.12/051-04-v6.17-arm64-dts-rockchip-enable-PCIe-on-ROCK-4D.patch b/target/linux/rockchip/patches-6.12/051-04-v6.17-arm64-dts-rockchip-enable-PCIe-on-ROCK-4D.patch
new file mode 100644 (file)
index 0000000..0514127
--- /dev/null
+++ b/target/linux/rockchip/patches-6.12/051-04-v6.17-arm64-dts-rockchip-enable-PCIe-on-ROCK-4D.patch
@@ -0,0 +1,56 @@
+From 29ff4bbff793334d6aff2238fdc3ccf3859d60da Mon Sep 17 00:00:00 2001
+From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
+Date: Sat, 21 Jun 2025 16:37:55 +0200
+Subject: [PATCH] arm64: dts: rockchip: enable PCIe on ROCK 4D
+
+The RADXA ROCK 4D board has a PCIe controller connected to a flat flex
+connector, compatible with the one the RPi5 uses.
+
+Enable the associated combphy and pcie controller node, as well as add
+the remaining pinctrl definition for the reset.
+
+Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
+Link: https://lore.kernel.org/r/20250621-rk3576-rock4d-pcie-v1-1-2b33c9f12955@collabora.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
+@@ -194,6 +194,10 @@
+       };
+ };
+ 
++&combphy0_ps {
++      status = "okay";
++};
++
+ &combphy1_psu {
+       status = "okay";
+ };
+@@ -652,6 +656,14 @@
+       };
+ };
+ 
++&pcie0 {
++      pinctrl-names = "default";
++      pinctrl-0 = <&pcie_reset>;
++      reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
++      vpcie3v3-supply = <&vcc_3v3_pcie>;
++      status = "okay";
++};
++
+ &pinctrl {
+       hym8563 {
+               hym8563_int: hym8563-int {
+@@ -678,6 +690,9 @@
+               pcie_pwren: pcie-pwren {
+                       rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
++              pcie_reset: pcie-reset {
++                      rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
++              };
+       };
+ 
+       usb {

diff --git a/target/linux/rockchip/patches-6.12/051-05-v6.17-arm64-dts-rockchip-Add-UFS-support-on-the-ROCK-4D.patch b/target/linux/rockchip/patches-6.12/051-05-v6.17-arm64-dts-rockchip-Add-UFS-support-on-the-ROCK-4D.patch
new file mode 100644 (file)
index 0000000..f611f3e
--- /dev/null
+++ b/target/linux/rockchip/patches-6.12/051-05-v6.17-arm64-dts-rockchip-Add-UFS-support-on-the-ROCK-4D.patch
@@ -0,0 +1,27 @@
+From 00abee2b18342d6c2f6f37225682fa7ca0d33142 Mon Sep 17 00:00:00 2001
+From: Detlev Casanova <detlev.casanova@collabora.com>
+Date: Tue, 8 Jul 2025 11:50:10 -0400
+Subject: [PATCH] arm64: dts: rockchip: Add UFS support on the ROCK 4D
+
+This device supports removable UFS chips, add support for it.
+
+Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
+Link: https://lore.kernel.org/r/20250708155010.401446-1-detlev.casanova@collabora.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
+@@ -745,6 +745,10 @@
+       status = "okay";
+ };
+ 
++&ufshc {
++      status = "okay";
++};
++
+ &usb_drd1_dwc3 {
+       dr_mode = "host";
+       status = "okay";

diff --git a/target/linux/rockchip/patches-6.12/051-06-v6.17-arm64-dts-rockchip-fix-PHY-handling-for-ROCK-4D.patch b/target/linux/rockchip/patches-6.12/051-06-v6.17-arm64-dts-rockchip-fix-PHY-handling-for-ROCK-4D.patch
new file mode 100644 (file)
index 0000000..f4a6f68
--- /dev/null
+++ b/target/linux/rockchip/patches-6.12/051-06-v6.17-arm64-dts-rockchip-fix-PHY-handling-for-ROCK-4D.patch
@@ -0,0 +1,53 @@
+From cd803da7c033e376a66793a43ee98e136bc6cc25 Mon Sep 17 00:00:00 2001
+From: Sebastian Reichel <sebastian.reichel@collabora.com>
+Date: Fri, 4 Jul 2025 19:31:59 +0200
+Subject: [PATCH] arm64: dts: rockchip: fix PHY handling for ROCK 4D
+
+Old revisions of the ROCK 4D board have a dedicated crystal to
+supply the RTL8211F PHY's 25MHz clock input. At least some newer
+revisions instead use REFCLKO25M_GMAC0_OUT. The DT already has
+this half-prepared, but there are some issues:
+
+1. The DT relies on auto-selecting the right PHY driver, which
+   requires that it works good enough to read the ID registers.
+   This does not work without the clock, which is handled by
+   the PHY driver. By updating the compatible to contain the
+   RTL8211F IDs, so that the operating system can choose the
+   right PHY driver without relying on a pre-powered PHY.
+
+2. Despite the name REFCLKO25M_GMAC0_OUT could also provide a
+   different frequency, so ensure it is explicitly set to 25
+   MHz as expected by the PHY.
+
+3. While at it switch from deprecated "enable-gpio" to standard
+   "enable-gpios".
+
+Fixes: a0fb7eca9c09 ("arm64: dts: rockchip: Add Radxa ROCK 4D device tree")
+Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+Link: https://lore.kernel.org/r/20250704-rk3576-rock4d-phy-handling-fixes-v1-1-1d64130c4139@kernel.org
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
+@@ -645,14 +645,16 @@
+ 
+ &mdio0 {
+       rgmii_phy0: ethernet-phy@1 {
+-              compatible = "ethernet-phy-ieee802.3-c22";
++              compatible = "ethernet-phy-id001c.c916";
+               reg = <0x1>;
+               clocks = <&cru REFCLKO25M_GMAC0_OUT>;
++              assigned-clocks = <&cru REFCLKO25M_GMAC0_OUT>;
++              assigned-clock-rates = <25000000>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&rtl8211f_rst>;
+               reset-assert-us = <20000>;
+               reset-deassert-us = <100000>;
+-              reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
++              reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
+       };
+ };
+ 

diff --git a/target/linux/rockchip/patches-6.12/051-07-v6.17-arm64-dts-rockchip-adjust-dcin-regulator-on-ROCK-4D.patch b/target/linux/rockchip/patches-6.12/051-07-v6.17-arm64-dts-rockchip-adjust-dcin-regulator-on-ROCK-4D.patch
new file mode 100644 (file)
index 0000000..d25e541
--- /dev/null
+++ b/target/linux/rockchip/patches-6.12/051-07-v6.17-arm64-dts-rockchip-adjust-dcin-regulator-on-ROCK-4D.patch
@@ -0,0 +1,59 @@
+From 9a625a284bfdb902f27f2949063731d189adda3c Mon Sep 17 00:00:00 2001
+From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
+Date: Mon, 30 Jun 2025 17:36:33 +0200
+Subject: [PATCH] arm64: dts: rockchip: adjust dcin regulator on ROCK 4D
+
+The ROCK 4D's actual DC input is 5V, and the schematic names it as being
+5V as well.
+
+Rename the regulator, and change the voltage it claims to be at.
+Furthermore, fix vcc_1v1_nldo_s3's vin-supply as coming from
+vcc_5v0_sys, and not the DCIN, as per the schematic. This makes no
+functional change; both regulators are always on, and one feeds into the
+other.
+
+Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
+Link: https://lore.kernel.org/r/20250630-rock4d-reg-usb-wifi-v1-1-1057f412d98c@collabora.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
+@@ -57,13 +57,13 @@
+               };
+       };
+ 
+-      vcc_12v0_dcin: regulator-vcc-12v0-dcin {
++      vcc_5v0_dcin: regulator-vcc-5v0-dcin {
+               compatible = "regulator-fixed";
+               regulator-always-on;
+               regulator-boot-on;
+-              regulator-min-microvolt = <12000000>;
+-              regulator-max-microvolt = <12000000>;
+-              regulator-name = "vcc_12v0_dcin";
++              regulator-min-microvolt = <5000000>;
++              regulator-max-microvolt = <5000000>;
++              regulator-name = "vcc_5v0_dcin";
+       };
+ 
+       vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
+@@ -166,7 +166,7 @@
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-name = "vcc_5v0_device";
+-              vin-supply = <&vcc_12v0_dcin>;
++              vin-supply = <&vcc_5v0_sys>;
+       };
+ 
+       vcc_5v0_host: regulator-vcc-5v0-host {
+@@ -190,7 +190,7 @@
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-name = "vcc_5v0_sys";
+-              vin-supply = <&vcc_12v0_dcin>;
++              vin-supply = <&vcc_5v0_dcin>;
+       };
+ };
+ 

diff --git a/target/linux/rockchip/patches-6.12/051-08-v6.17-arm64-dts-rockchip-complete-USB-nodes-on-ROCK-4D.patch b/target/linux/rockchip/patches-6.12/051-08-v6.17-arm64-dts-rockchip-complete-USB-nodes-on-ROCK-4D.patch
new file mode 100644 (file)
index 0000000..5d91875
--- /dev/null
+++ b/target/linux/rockchip/patches-6.12/051-08-v6.17-arm64-dts-rockchip-complete-USB-nodes-on-ROCK-4D.patch
@@ -0,0 +1,94 @@
+From 787595b423d855bfcbf724822fd1e663ad368d08 Mon Sep 17 00:00:00 2001
+From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
+Date: Mon, 30 Jun 2025 17:36:34 +0200
+Subject: [PATCH] arm64: dts: rockchip: complete USB nodes on ROCK 4D
+
+The ROCK 4D uses both USB controllers, and both of which in host mode.
+However, it still names one of the supplies for them "OTG" in the
+schematic.
+
+Fix the "host" supply's input, and add the "otg" supply. Enable the
+remaining USB PHY nodes, and the first controller node as well.
+
+Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
+Link: https://lore.kernel.org/r/20250630-rock4d-reg-usb-wifi-v1-2-1057f412d98c@collabora.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ .../boot/dts/rockchip/rk3576-rock-4d.dts      | 41 ++++++++++++++++++-
+ 1 file changed, 39 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
+@@ -180,7 +180,21 @@
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-name = "vcc5v0_host";
+-              vin-supply = <&vcc_5v0_device>;
++              vin-supply = <&vcc_5v0_sys>;
++      };
++
++      vcc_5v0_otg: regulator-vcc-5v0-otg {
++              compatible = "regulator-fixed";
++              enable-active-high;
++              gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
++              pinctrl-names = "default";
++              pinctrl-0 = <&usb_otg_pwren>;
++              regulator-always-on;
++              regulator-boot-on;
++              regulator-min-microvolt = <5000000>;
++              regulator-max-microvolt = <5000000>;
++              regulator-name = "vcc5v0_otg";
++              vin-supply = <&vcc_5v0_sys>;
+       };
+ 
+       vcc_5v0_sys: regulator-vcc-5v0-sys {
+@@ -699,7 +713,11 @@
+ 
+       usb {
+               usb_host_pwren: usb-host-pwren {
+-                      rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
++                      rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_down>;
++              };
++              usb_otg_pwren: usb-otg-pwren {
++                      rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_down>;
++
+               };
+       };
+ };
+@@ -738,10 +756,20 @@
+       status = "okay";
+ };
+ 
++&u2phy0_otg {
++      phy-supply = <&vcc_5v0_otg>;
++      status = "okay";
++};
++
+ &u2phy1 {
+       status = "okay";
+ };
+ 
++&u2phy1_otg {
++      phy-supply = <&vcc_5v0_host>;
++      status = "okay";
++};
++
+ &uart0 {
+       pinctrl-0 = <&uart0m0_xfer>;
+       status = "okay";
+@@ -751,6 +779,15 @@
+       status = "okay";
+ };
+ 
++&usbdp_phy {
++      status = "okay";
++};
++
++&usb_drd0_dwc3 {
++      dr_mode = "host";
++      status = "okay";
++};
++
+ &usb_drd1_dwc3 {
+       dr_mode = "host";
+       status = "okay";

diff --git a/target/linux/rockchip/patches-6.12/051-09-v6.17-arm64-dts-rockchip-theoretically-enable-Wi-Fi-on-ROCK-4D.patch b/target/linux/rockchip/patches-6.12/051-09-v6.17-arm64-dts-rockchip-theoretically-enable-Wi-Fi-on-ROCK-4D.patch
new file mode 100644 (file)
index 0000000..2c9e0e0
--- /dev/null
+++ b/target/linux/rockchip/patches-6.12/051-09-v6.17-arm64-dts-rockchip-theoretically-enable-Wi-Fi-on-ROCK-4D.patch
@@ -0,0 +1,75 @@
+From eebf59470a76a38d0c43005a34483e1a52a33de0 Mon Sep 17 00:00:00 2001
+From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
+Date: Mon, 30 Jun 2025 17:36:35 +0200
+Subject: [PATCH] arm64: dts: rockchip: theoretically enable Wi-Fi on ROCK 4D
+
+The production version of the ROCK 4D appears to sport a AICSEMI
+AIC8800D80 USB Wi-Fi + BT chipset. This chip does not yet have a
+mainline driver.
+
+Add the necessary rfkill node and wifi regulator node to at least make
+it show up in lsusb output. The regulator is set as always-on, as like 2
+hours deep into debugging why onboard_usb_dev.c wouldn't try enabling
+the regulator the device needs to actually show up and thus bind to
+onboard_usb_dev.c, I decided that it's not worth the effort.
+
+Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
+Link: https://lore.kernel.org/r/20250630-rock4d-reg-usb-wifi-v1-3-1057f412d98c@collabora.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ .../boot/dts/rockchip/rk3576-rock-4d.dts      | 30 +++++++++++++++++++
+ 1 file changed, 30 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
+@@ -37,6 +37,14 @@
+               };
+       };
+ 
++      rfkill {
++              compatible = "rfkill-gpio";
++              pinctrl-names = "default";
++              pinctrl-0 = <&wifi_en_h>;
++              radio-type = "wlan";
++              shutdown-gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
++      };
++
+       leds: leds {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+@@ -159,6 +167,19 @@
+               vin-supply = <&vcc_5v0_sys>;
+       };
+ 
++      vcc_3v3_wifi: regulator-vcc-3v3-wifi {
++              compatible = "regulator-fixed";
++              enable-active-high;
++              gpios = <&gpio2 RK_PC7 GPIO_ACTIVE_HIGH>;
++              pinctrl-names = "default";
++              pinctrl-0 = <&usb_wifi_pwr>;
++              regulator-always-on;
++              regulator-min-microvolt = <3300000>;
++              regulator-max-microvolt = <3300000>;
++              regulator-name = "vcc_3v3_wifi";
++              vin-supply = <&vcc_3v3_s3>;
++      };
++
+       vcc_5v0_device: regulator-vcc-5v0-device {
+               compatible = "regulator-fixed";
+               regulator-always-on;
+@@ -720,6 +741,15 @@
+ 
+               };
+       };
++
++      wifi {
++              usb_wifi_pwr: usb-wifi-pwr {
++                      rockchip,pins = <2 RK_PC7 RK_FUNC_GPIO &pcfg_pull_down>;
++              };
++              wifi_en_h: wifi-en-h {
++                      rockchip,pins = <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_down>;
++              };
++      };
+ };
+ 
+ &sdmmc {

diff --git a/target/linux/rockchip/patches-6.12/051-10-v6.17-arm64-dts-rockchip-add-HDMI-audio-on-ROCK-4D.patch b/target/linux/rockchip/patches-6.12/051-10-v6.17-arm64-dts-rockchip-add-HDMI-audio-on-ROCK-4D.patch
new file mode 100644 (file)
index 0000000..e2bc109
--- /dev/null
+++ b/target/linux/rockchip/patches-6.12/051-10-v6.17-arm64-dts-rockchip-add-HDMI-audio-on-ROCK-4D.patch
@@ -0,0 +1,43 @@
+From e6066edc9413191479b05596ba06c40908f44e22 Mon Sep 17 00:00:00 2001
+From: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
+Date: Mon, 30 Jun 2025 12:19:27 +0200
+Subject: [PATCH] arm64: dts: rockchip: add HDMI audio on ROCK 4D
+
+Much like the Sige5, the ROCK 4D also has an HDMI port, so is capable of
+providing HDMI audio output as well.
+
+Enable the SoC's hdmi_sound card, and also enable the SoC audio
+controller (sai6) that feeds into it.
+
+Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
+Tested-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
+Link: https://lore.kernel.org/r/20250630-rock4d-audio-v1-4-0b3c8e8fda9c@collabora.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
+@@ -304,6 +304,10 @@
+       };
+ };
+ 
++&hdmi_sound {
++      status = "okay";
++};
++
+ &hdptxphy {
+       status = "okay";
+ };
+@@ -752,6 +756,10 @@
+       };
+ };
+ 
++&sai6 {
++      status = "okay";
++};
++
+ &sdmmc {
+       bus-width = <4>;
+       cap-mmc-highspeed;

diff --git a/target/linux/rockchip/patches-6.12/134-arm64-dts-rockchip-Update-LED-properties-for-Radxa-ROCK-4D.patch b/target/linux/rockchip/patches-6.12/134-arm64-dts-rockchip-Update-LED-properties-for-Radxa-ROCK-4D.patch
new file mode 100644 (file)
index 0000000..9ec32d1
--- /dev/null
+++ b/target/linux/rockchip/patches-6.12/134-arm64-dts-rockchip-Update-LED-properties-for-Radxa-ROCK-4D.patch
@@ -0,0 +1,26 @@
+--- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
+@@ -18,6 +18,10 @@
+       compatible = "radxa,rock-4d", "rockchip,rk3576";
+ 
+       aliases {
++              led-boot = &power_led;
++              led-failsafe = &power_led;
++              led-running = &power_led;
++              led-upgrade = &power_led;
+               ethernet0 = &gmac0;
+               mmc0 = &sdmmc;
+       };
+@@ -50,11 +54,10 @@
+               pinctrl-names = "default";
+               pinctrl-0 = <&led_rgb_g &led_rgb_r>;
+ 
+-              power-led {
++              power_led: power-led {
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_STATUS;
+                       gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
+-                      linux,default-trigger = "default-on";
+               };
+ 
+               user-led {

diff --git a/target/linux/rockchip/patches-6.12/135-arm64-dts-rockchip-lower-mmc-speed-for-Radxa-ROCK-4D.patch b/target/linux/rockchip/patches-6.12/135-arm64-dts-rockchip-lower-mmc-speed-for-Radxa-ROCK-4D.patch
new file mode 100644 (file)
index 0000000..ad5b884
--- /dev/null
+++ b/target/linux/rockchip/patches-6.12/135-arm64-dts-rockchip-lower-mmc-speed-for-Radxa-ROCK-4D.patch
@@ -0,0 +1,11 @@
+--- a/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
+@@ -771,7 +771,7 @@
+       max-frequency = <200000000>;
+       no-sdio;
+       no-mmc;
+-      sd-uhs-sdr104;
++      sd-uhs-sdr50;
+       vmmc-supply = <&vcc_3v3_s3>;
+       vqmmc-supply = <&vccio_sd_s0>;
+       status = "okay";