]> git.ipfire.org Git - thirdparty/openwrt.git/commitdiff
realtek: add support for RTL8218E 20068/head
authorThomas Martitz <thomas.martitz@mailbox.org>
Thu, 18 Sep 2025 07:09:04 +0000 (09:09 +0200)
committerHauke Mehrtens <hauke@hauke-m.de>
Sun, 21 Sep 2025 23:15:12 +0000 (01:15 +0200)
ZyXEL XGS1250-12 Rev.B1 has RTL8218E compared to RTL8218D in Rev.A1
but both of them seem very similar and pin compatible. Therefore
they can share the same phy_driver callbacks.

PHY identifier is set based on the datasheet from
  https://github.com/plappermaul/realtek-doc/blob/main/RTL8218E-CG_Datasheet.pdf

Before:

[    2.120161] rtl83xx-switch switch@1b000000 lan1 (uninitialized): PHY [mdio-bus:00] driver [Generic PHY] (irq=POLL)
[    2.134581] rtl83xx-switch switch@1b000000 lan2 (uninitialized): PHY [mdio-bus:01] driver [Generic PHY] (irq=POLL)
[    2.149043] rtl83xx-switch switch@1b000000 lan3 (uninitialized): PHY [mdio-bus:02] driver [Generic PHY] (irq=POLL)
[    2.163498] rtl83xx-switch switch@1b000000 lan4 (uninitialized): PHY [mdio-bus:03] driver [Generic PHY] (irq=POLL)
[    2.177963] rtl83xx-switch switch@1b000000 lan5 (uninitialized): PHY [mdio-bus:04] driver [Generic PHY] (irq=POLL)
[    2.192435] rtl83xx-switch switch@1b000000 lan6 (uninitialized): PHY [mdio-bus:05] driver [Generic PHY] (irq=POLL)
[    2.207009] rtl83xx-switch switch@1b000000 lan7 (uninitialized): PHY [mdio-bus:06] driver [Generic PHY] (irq=POLL)
[    2.221474] rtl83xx-switch switch@1b000000 lan8 (uninitialized): PHY [mdio-bus:07] driver [Generic PHY] (irq=POLL)

After:

[    2.119165] rtl83xx-switch switch@1b000000 lan1 (uninitialized): PHY [mdio-bus:00] driver [REALTEK RTL8218E] (irq=POLL)
[    2.132880] rtl83xx-switch switch@1b000000 lan2 (uninitialized): PHY [mdio-bus:01] driver [REALTEK RTL8218E] (irq=POLL)
[    2.146727] rtl83xx-switch switch@1b000000 lan3 (uninitialized): PHY [mdio-bus:02] driver [REALTEK RTL8218E] (irq=POLL)
[    2.160580] rtl83xx-switch switch@1b000000 lan4 (uninitialized): PHY [mdio-bus:03] driver [REALTEK RTL8218E] (irq=POLL)
[    2.174367] rtl83xx-switch switch@1b000000 lan5 (uninitialized): PHY [mdio-bus:04] driver [REALTEK RTL8218E] (irq=POLL)
[    2.188270] rtl83xx-switch switch@1b000000 lan6 (uninitialized): PHY [mdio-bus:05] driver [REALTEK RTL8218E] (irq=POLL)
[    2.202140] rtl83xx-switch switch@1b000000 lan7 (uninitialized): PHY [mdio-bus:06] driver [REALTEK RTL8218E] (irq=POLL)
[    2.216047] rtl83xx-switch switch@1b000000 lan8 (uninitialized): PHY [mdio-bus:07] driver [REALTEK RTL8218E] (irq=POLL)

Based-on-patch-by: Antanas Bruzas <antanas.bruzas@protonmail.com>
Signed-off-by: Thomas Martitz <thomas.martitz@mailbox.org>
Link: https://github.com/openwrt/openwrt/pull/20068
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.c
target/linux/realtek/files-6.12/drivers/net/phy/rtl83xx-phy.h

index e083654cd4b4ac963aaabc37601c55166bee81fa..9ea73e6fa18f0f2902c47b044c5749b7b953d7dc 100644 (file)
@@ -3263,7 +3263,7 @@ static int rtl8218b_int_phy_probe(struct phy_device *phydev)
        return 0;
 }
 
-static int rtl8218d_phy_probe(struct phy_device *phydev)
+static int rtl8218x_phy_probe(struct phy_device *phydev)
 {
        int base_addr = phydev->mdio.addr & ~7;
 
@@ -3445,7 +3445,20 @@ static struct phy_driver rtl83xx_phy_driver[] = {
                .name           = "REALTEK RTL8218D",
                .config_init    = rtl821x_config_init,
                .features       = PHY_GBIT_FEATURES,
-               .probe          = rtl8218d_phy_probe,
+               .probe          = rtl8218x_phy_probe,
+               .read_mmd       = rtl821x_read_mmd,
+               .read_page      = rtl821x_read_page,
+               .resume         = genphy_resume,
+               .suspend        = genphy_suspend,
+               .write_mmd      = rtl821x_write_mmd,
+               .write_page     = rtl821x_write_page,
+       },
+       {
+               PHY_ID_MATCH_EXACT(PHY_ID_RTL8218E),
+               .name           = "REALTEK RTL8218E",
+               .config_init    = rtl821x_config_init,
+               .features       = PHY_GBIT_FEATURES,
+               .probe          = rtl8218x_phy_probe,
                .read_mmd       = rtl821x_read_mmd,
                .read_page      = rtl821x_read_page,
                .resume         = genphy_resume,
index d054b9bd9a7c8e904e0728488280e1f1bbfbb0bc..81ef182e42ca9356fea82350feb5deb47d78576c 100644 (file)
@@ -23,6 +23,7 @@ struct __attribute__ ((__packed__)) fw_header {
 #define PHY_ID_RTL8218B_E                      0x001cc980
 #define PHY_ID_RTL8214_OR_8218                 0x001cc981
 #define PHY_ID_RTL8218D                                0x001cc983
+#define PHY_ID_RTL8218E                                0x001cc984
 #define PHY_ID_RTL8218B_I                      0x001cca40
 #define PHY_ID_RTL8390_GENERIC                 0x001ccab0
 #define PHY_ID_RTL8393_I                       0x001c8393