From: Tristan Gingold Date: Tue, 18 Sep 2012 12:21:53 +0000 (+0000) Subject: gas/ X-Git-Tag: binutils-2_23~48 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=0018e803d81b57ad9c3090ae1bec67dff7da814b;p=thirdparty%2Fbinutils-gdb.git gas/ 2012-08-17 Nagajyothi Eggone * config/tc-i386.c (cpu_arch): Add CPU_BTVER1_FLAGS and CPU_BTVER2_FLAGS. (i386_align_code): Add case for PROCESSOR_BT. * config/tc-i386.h (enum processor_type): Add PROCESSOR_BT. * doc/c-i386.texi: Add -march={btver1, btver2} options. gas/testsuite/ 2012-08-17 Nagajyothi Eggone * gas/i386/i386.exp: Run btver1 and btver2 test cases. * gas/i386/nops-1-btver1.d: New. * gas/i386/nops-1-btver2.d: New. * gas/i386/arch-10-btver1.d: New. * gas/i386/arch-10-btver2.d: New. * gas/i386/x86-64-nops-1-btver1.d: New. * gas/i386/x86-64-nops-1-btver2.d: New. * gas/i386/x86-64-arch-2-btver1.d: New. * gas/i386/x86-64-arch-2-btver2.d: New. opcodes/ 2012-08-17 Nagajyothi Eggone * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and CPU_BTVER2_FLAGS. * i386-opc.h: Update CpuPRFCHW comment. * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index 7a8e1677ff4..b106c9597df 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,13 @@ +2012-08-17 Nagajyothi Eggone + + * config/tc-i386.c (cpu_arch): Add CPU_BTVER1_FLAGS and + CPU_BTVER2_FLAGS. + (i386_align_code): Add case for PROCESSOR_BT. + + * config/tc-i386.h (enum processor_type): Add PROCESSOR_BT. + + * doc/c-i386.texi: Add -march={btver1, btver2} options. + 2012-09-10 Matthias Klose * config.in: Disable sanity check for kfreebsd. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 9bd2f64cdb6..a3512b900f2 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -663,6 +663,10 @@ static const arch_entry cpu_arch[] = CPU_BDVER1_FLAGS, 0, 0 }, { STRING_COMMA_LEN ("bdver2"), PROCESSOR_BD, CPU_BDVER2_FLAGS, 0, 0 }, + { STRING_COMMA_LEN ("btver1"), PROCESSOR_BT, + CPU_BTVER1_FLAGS, 0, 0 }, + { STRING_COMMA_LEN ("btver2"), PROCESSOR_BT, + CPU_BTVER2_FLAGS, 0, 0 }, { STRING_COMMA_LEN (".8087"), PROCESSOR_UNKNOWN, CPU_8087_FLAGS, 0, 0 }, { STRING_COMMA_LEN (".287"), PROCESSOR_UNKNOWN, @@ -1058,7 +1062,7 @@ i386_align_code (fragS *fragP, int count) PROCESSOR_CORE, PROCESSOR_CORE2, PROCESSOR_COREI7, and PROCESSOR_GENERIC64, alt_long_patt will be used. 3. For PROCESSOR_ATHLON, PROCESSOR_K6, PROCESSOR_K8 and - PROCESSOR_AMDFAM10, and PROCESSOR_BD, alt_short_patt + PROCESSOR_AMDFAM10, PROCESSOR_BD and PROCESSOR_BT, alt_short_patt will be used. When -mtune= isn't used, alt_long_patt will be used if @@ -1113,6 +1117,7 @@ i386_align_code (fragS *fragP, int count) case PROCESSOR_K8: case PROCESSOR_AMDFAM10: case PROCESSOR_BD: + case PROCESSOR_BT: patt = alt_short_patt; break; case PROCESSOR_I386: @@ -1142,6 +1147,7 @@ i386_align_code (fragS *fragP, int count) case PROCESSOR_K8: case PROCESSOR_AMDFAM10: case PROCESSOR_BD: + case PROCESSOR_BT: case PROCESSOR_GENERIC32: /* We use cpu_arch_isa_flags to check if we CAN optimize with nops. */ diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h index d4d7d96e046..de132d69d7a 100644 --- a/gas/config/tc-i386.h +++ b/gas/config/tc-i386.h @@ -245,7 +245,8 @@ enum processor_type PROCESSOR_GENERIC32, PROCESSOR_GENERIC64, PROCESSOR_AMDFAM10, - PROCESSOR_BD + PROCESSOR_BD, + PROCESSOR_BT }; extern enum processor_type cpu_arch_tune; diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 5040c25f970..5b7b007174d 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -120,6 +120,8 @@ processor names are recognized: @code{amdfam10}, @code{bdver1}, @code{bdver2}, +@code{btver1}, +@code{btver2}, @code{generic32} and @code{generic64}. @@ -1013,6 +1015,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{corei7} @tab @samp{l1om} @tab @samp{k1om} @item @samp{k6} @tab @samp{k6_2} @tab @samp{athlon} @tab @samp{k8} @item @samp{amdfam10} @tab @samp{bdver1} @tab @samp{bdver2} +@item @samp{btver1} @tab @samp{btver2} @item @samp{generic32} @tab @samp{generic64} @item @samp{.mmx} @tab @samp{.sse} @tab @samp{.sse2} @tab @samp{.sse3} @item @samp{.ssse3} @tab @samp{.sse4.1} @tab @samp{.sse4.2} @tab @samp{.sse4} diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index c46d61dc7bb..5c36f797a79 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,16 @@ +2012-08-17 Nagajyothi Eggone + + * gas/i386/i386.exp: Run btver1 and btver2 test cases. + + * gas/i386/nops-1-btver1.d: New. + * gas/i386/nops-1-btver2.d: New. + * gas/i386/arch-10-btver1.d: New. + * gas/i386/arch-10-btver2.d: New. + * gas/i386/x86-64-nops-1-btver1.d: New. + * gas/i386/x86-64-nops-1-btver2.d: New. + * gas/i386/x86-64-arch-2-btver1.d: New. + * gas/i386/x86-64-arch-2-btver2.d: New. + 2012-08-11 Saravanan Ekanathan PR gas/14423 diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 285a40fa499..d6a63f6f78b 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -84,6 +84,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "nops-1-core2" run_dump_test "nops-1-bdver1" run_dump_test "nops-1-bdver2" + run_dump_test "nops-1-btver1" + run_dump_test "nops-1-btver2" run_dump_test "nops-2" run_dump_test "nops-2-i386" run_dump_test "nops-2-core2" @@ -128,6 +130,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "arch-10-lzcnt" run_dump_test "arch-10-prefetchw" run_dump_test "arch-10-bdver2" + run_dump_test "arch-10-btver1" + run_dump_test "arch-10-btver2" run_list_test "arch-10-1" "-march=generic32 -I${srcdir}/$subdir -al" run_list_test "arch-10-2" "-march=i686 -I${srcdir}/$subdir -al" run_list_test "arch-10-3" "-march=i686+sse4.2 -I${srcdir}/$subdir -al" @@ -348,6 +352,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-nops-1-pentium" run_dump_test "x86-64-nops-1-bdver1" run_dump_test "x86-64-nops-1-bdver2" + run_dump_test "x86-64-nops-1-btver1" + run_dump_test "x86-64-nops-1-btver2" run_dump_test "x86-64-nops-2" run_dump_test "x86-64-nops-3" run_dump_test "x86-64-nops-4" @@ -382,6 +388,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-arch-2-lzcnt" run_dump_test "x86-64-arch-2-prefetchw" run_dump_test "x86-64-arch-2-bdver2" + run_dump_test "x86-64-arch-2-btver1" + run_dump_test "x86-64-arch-2-btver2" run_dump_test "x86-64-xsave" run_dump_test "x86-64-xsave-intel" run_dump_test "x86-64-aes" diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index e14c80819fb..f8ba0a6a648 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,14 @@ +2012-08-17 Nagajyothi Eggone + + * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and + CPU_BTVER2_FLAGS. + + * i386-opc.h: Update CpuPRFCHW comment. + + * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW. + * i386-init.h: Regenerated. + * i386-tbl.h: Likewise. + 2012-08-11 Saravanan Ekanathan PR gas/14423 diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 6c49747925a..9dee51a8e4e 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -92,6 +92,10 @@ static initializer cpu_flag_init[] = "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP" }, { "CPU_BDVER2_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C" }, + { "CPU_BTVER1_FLAGS", + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW" }, + { "CPU_BTVER2_FLAGS", + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuSSE4_1|CpuSSE4_2|CpuABM|CpuLM|CpuBMI|CpuF16C|CpuAES|CpuPCLMUL|CpuAVX|CpuMovbe|CpuXsave|CpuXsaveopt|CpuPRFCHW" }, { "CPU_8087_FLAGS", "Cpu8087" }, { "CPU_287_FLAGS", diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h index 1c62b9fc5d0..8d39409b777 100644 --- a/opcodes/i386-init.h +++ b/opcodes/i386-init.h @@ -169,6 +169,18 @@ 1, 1, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \ 0, 0 } } +#define CPU_BTVER1_FLAGS \ + { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 1, \ + 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, \ + 0, 0 } } + +#define CPU_BTVER2_FLAGS \ + { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 1, \ + 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, \ + 0, 1, 0, 1, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, \ + 0, 0 } } + #define CPU_8087_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 598b2202728..21f33a9a4c1 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -148,7 +148,7 @@ enum CpuRDSEED, /* Multi-presisionn add-carry instructions are required. */ CpuADX, - /* Supports prefetchw instruction. */ + /* Supports prefetchw and prefetch instructions. */ CpuPRFCHW, /* 64bit support required */ Cpu64, diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index faff2437cc7..8b08edc8798 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -2965,7 +2965,7 @@ tzmsk, 2, 0x01, 0x4, 1, CpuTBM, Modrm|CheckRegSize|Vex=3|VexOpcode=4|VexVVVV= // AMD 3DNow! instructions. -prefetch, 1, 0xf0d, 0x0, 2, Cpu3dnow, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S } +prefetch, 1, 0xf0d, 0x0, 2, Cpu3dnow|CpuPRFCHW, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S } prefetchw, 1, 0xf0d, 0x1, 2, Cpu3dnow|CpuPRFCHW, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S } femms, 0, 0xf0e, None, 2, Cpu3dnow, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 } pavgusb, 2, 0xf0f, 0xbf, 2, Cpu3dnow, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ImmExt, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegMMX, RegMMX } diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index faca6bbe462..001a966d474 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -38403,7 +38403,7 @@ const insn_template i386_optab[] = { "prefetch", 1, 0xf0d, 0x0, 2, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }, { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,